ADM3311EARSZ Analog Devices Inc, ADM3311EARSZ Datasheet - Page 16

• Manufacturer Part Number: ADM3311EARSZ
• Description: IC TXRX RS-232 3:5 2.7V 28SSOP
• Manufacturer: Analog Devices Inc
• Type: Transceiverr

Specifications of ADM3311EARSZ

• Number Of Drivers/receivers: 3/5
• Protocol: RS232
• Voltage - Supply: 2.7 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Device Type: Transceiver
• Ic Interface Type: RS232
• No. Of Drivers: 1
• Supply Voltage Range: 2.7V To 3.6V
• Driver Case Style: SSOP
• No. Of Pins: 28
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
The transmitter outputs and receiver inputs have a similar
protection structure. The receiver inputs can also dissipate some
of the energy through the internal 5 kΩ (or 22 kΩ for the
ADM3310E) resistor to GND as well as through the protection
diodes.
The ADM3307E protection scheme is slightly different (see
Figure 32 and Figure 33). The receiver inputs, transmitter
inputs, and transmitter outputs contain two back-to-back high
speed clamping diodes. The receiver outputs (CMOS outputs),
the SD and EN pins, contain a single reverse biased high speed
clamping diode. Under normal operation with maximum
CMOS signal levels, the receiver output, SD, and EN protection
diodes have no effect because they are reversed biased. If,
however, the voltage exceeds about 15 V, reverse breakdown
occurs and the voltage is clamped at this level. If the voltage
reaches −0.7 V, the diode is forward biased and the voltage is
clamped at this level. The receiver inputs can also dissipate
some of the energy through the internal 5 kΩ resistor to GND
as well as through the protection diodes.
TRANSMITTER
The protection structures achieve ESD protection up to ±15 kV
on all RS-232 I/O lines (and all CMOS lines, including SD and
EN for the ADM3307E). For methods used to test the
protection scheme, see the ESD Testing (IEC 1000-4-2) section.
RECEIVER
INPUT
OUTPUT
Figure 33. ADM3307E Transmitter Output Protection Scheme
RECEIVER
Figure 32. ADM3307E Receiver Input Protection Scheme
INPUT
Figure 31. Transmitter Output Protection Scheme
Figure 30. Receiver Input Protection Scheme
Tx
R
IN
D3
D4
D1
D2
D1
D2
Tx
R
IN
Rx
D3
D1
D2
D1
D2
TRANSMITTER
OUTPUT
Rx
TRANSMITTER
INPUT
RECEIVER
OUTPUT
Rev. H | Page 16 of 24
ESD TESTING (IEC 1000-4-2)
IEC 1000-4-2 (previously 801-2) specifies compliance testing
using two coupling methods, contact discharge and air-gap
discharge. Contact discharge calls for a direct connection to the
unit being tested. Airgap discharge uses a higher test voltage but
does not make direct contact with the unit under testing. With
air discharge, the discharge gun is moved toward the unit under
testing, which develops an arc across the air gap, thus the term
air discharge. This method is influenced by humidity,
temperature, barometric pressure, distance, and rate of closure
of the discharge gun. The contact discharge method, while less
realistic, is more repeatable and is gaining acceptance in
preference to the air-gap method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time coupled with high voltages can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or
heating. Even if catastrophic failure does not occur immediately,
the device can suffer from parametric degradation that can
result in degraded performance. The cumulative effects of
continuous exposure can eventually lead to complete failure.
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I/O port. Traditional ESD test
methods, such as the MIL-STD-883B method 3015.7, do not
fully test a product’s susceptibility to this type of discharge. This
test was intended to test a product’s susceptibility to ESD
damage during handling.
Each pin is tested with respect to all other pins. There are some
important differences between the traditional test and the IEC
test.
• The IEC test is much more stringent in terms of discharge
• The current rise time is significantly faster in the IEC test.
• The IEC test is carried out while power is applied to the
It is possible that the ESD discharge could induce latch-up in
the device under test. This test, therefore, is more representative
of a real world I/O discharge where the equipment is operating
normally with power applied. For maximum peace of mind,
however, both tests should be performed, ensuring maximum
protection both during handling and later during field service.
energy. The peak current injected is over four times greater.
device.