PIC16F628A-I/P Microchip Technology Inc., PIC16F628A-I/P Datasheet - Page 67

• Manufacturer Part Number: PIC16F628A-I/P
• Description: 18 PIN, 3.5 KB FLASH, 224 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F628A-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 16
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 224 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

11.3.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available: the CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
EQUATION 11-1:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR1H until after a match between PR2 and TMR2
occurs (i.e., the period is complete). In PWM mode,
CCPR1H is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
Maximum PWM resolution (bits) for a given PWM
frequency:
TABLE 11-4:
TABLE 11-5:
 2003 Microchip Technology Inc.
0Bh/8Bh/
10Bh/18Bh
0Ch
8Ch
87h
11h
92h
12h
15h
16h
17h
Legend:
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Address
PWM duty cycle = (CCPR1L:CCP1CON<5:4>) •
x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PWM and Timer2.
PWM DUTY CYCLE
INTCON
PIR1
PIE1
TRISB
TMR2
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
PWM Frequency
Name
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz
REGISTERS ASSOCIATED WITH PWM AND TIMER2
Tosc • (TMR2 prescale value)
PWM DUTY CYCLE
PORTB Data Direction Register
Timer2 module’s register
Timer2 module’s period register
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
Bit 7
EEIF
EEIE
GIE
—
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
Bit 6
CMIF
CMIE
PEIE
—
CCP1X
Bit 5
RCIF
RCIE
T0IE
1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz
0xFF
16
10
Preliminary
CCP1Y
Bit 4
INTE
TXIF
TXIE
0xFF
10
CCP1M3
4
Bit 3
RBIE
EQUATION 11-2:
For an example on the PWM period and duty cycle
calculation, see the PICmicro™ Mid-Range Reference
Manual (DS33023).
11.3.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
—
—
Note:
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISB<3> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
PWM
Resolution =
TMR2ON
CCP1M2
CCP1IF
CCP1IE
0xFF
Bit 2
T0IF
10
1
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
SET-UP FOR PWM OPERATION
T2CKPS1 T2CKPS0
CCP1M1
TMR2IE
TMR2IF
log ( Fpwm x TMR2 Prescaler
Bit 1
INTF
0x3F
1
8
MAXIMUM PWM
RESOLUTION
PIC16F62X
CCP1M0
TMR1IF
TMR1IE
Bit 0
RBIF
Fosc
log (2)
0x1F
1
7
0000 000x
0000 -000
0000 -000
1111 1111
0000 0000
1111 1111
-000 0000
xxxx xxxx
xxxx xxxx
--00 0000
DS40300C-page 65
Value on
POR
)
bits
0x17
6.5
1
0000 000u
0000 -000
0000 -000
1111 1111
0000 0000
1111 1111
uuuu uuuu
uuuu uuuu
--00 0000
Value on
RESETS
all other
uuuu