PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 220

• Manufacturer Part Number: PIC18F8520-I/PT
• Description: 80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8520-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 68
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC18F6520/8520/6620/8620/6720/8720
19.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 19-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 k . After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
To
Equation 19-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
EQUATION 19-1:
EQUATION 19-2:
EXAMPLE 19-1:
DS39609B-page 218
T
V
or
T
T
Temperature coefficient is only required for temperatures > 25 C.
T
T
T
ACQ
C
ACQ
ACQ
C
ACQ
DD
Note:
HOLD
). The source impedance affects the offset voltage
calculate
=
=
A/D Acquisition Requirements
SS
=
=
=
=
=
=
SS
) impedance varies over the device voltage
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) impedance directly affect the time
AMP
(V
-(120 pF)(1 k + R
T
2 s + T
-C
-120 pF (1 k + 7 k + 2.5 k ) ln(0.0004885)
-120 pF (10.5 k ) ln(0.0004885)
-1.26 s (-7.6241)
9.61 s
2 s + 9.61 s + [(50 C – 25 C)(0.05 s/ C)]
11.61 s + 1.25 s
12.86 s
REF
AMP
the
HOLD
+ T
– (V
+ T
C
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
C
S
+ T
(R
minimum
REF
C
) and the internal sampling
+ [(Temp – 25 C)(0.05 s/ C)]
IC
+ T
COFF
/2048)) • (1 – e
+ R
COFF
SS
HOLD
SS
+ R
HOLD
+ R
acquisition
) must be allowed
S
S
) ln(1/2047)
) ln(1/2047)
. The sampling
(-Tc/C
HOLD
time,
(R
IC
+ R
SS
+ R
S
))
)
Example 19-1 shows the calculation of the minimum
required acquisition time, T
based
assumptions:
C
Rs
Conversion Error
V
Temperature
V
DD
HOLD
HOLD
Note: When using external voltage references with
on
the A/D converter, the source impedance of
the external voltage references must be less
than 20
specified in parameters A01-A06. Higher
reference source impedances will increase
both offset and gain errors. Resistive voltage
dividers will not provide a sufficiently low
source impedance.
To maintain the best possible performance in
A/D conversions, external V
be buffered with an operational amplifier or
other low output impedance circuit.
If deviating from the operating conditions
specified for parameters A03-A06, the effect
of parameter A50 (V
be considered.
the
=
=
=
=
=
following
to obtain the A/D performance
 2004 Microchip Technology Inc.
120 pF
2.5 k
1/2 LSb
5V
50 C (system max.)
0V @ time = 0
ACQ
REF
Rss = 7 k
. This calculation is
application
input current) must
REF
inputs should
system