PIC24FJ64GA002-I/SO Microchip Technology Inc., PIC24FJ64GA002-I/SO Datasheet - Page 104

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PIC24FJ64GA002-I/SO

Manufacturer Part Number
PIC24FJ64GA002-I/SO
Description
MCU, 16-Bit, 28-Pin, 64KB Flash, 8KB RAM, 21 I/O, Nanowatt
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ64GA002-I/SO

A/d Inputs
10 Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Memory Capacity
64 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
21
Number Of Pins
28
Package Type
28-pin SOIC
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Speed
32 MHz
Timers
5-16-bit
Voltage, Range
2-3.6 V
Voltage, Rating
2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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9.4.5
The ability to control peripheral pin selection introduces
several considerations into application design that
could be overlooked. This is particularly true for several
common peripherals that are available only as
remappable peripherals.
The main consideration is that the peripheral pin
selects are not available on default pins in the device’s
default (Reset) state. Since all RPINRx registers reset
to ‘11111’ and all RPORx registers reset to ‘00000’, all
peripheral pin select inputs are tied to RP31 and all
peripheral pin select outputs are disconnected.
This situation requires the user to initialize the device
with the proper peripheral configuration before any
other application code is executed. Since the IOLOCK
bit resets in the unlocked state, it is not necessary to
execute the unlock sequence after the device has
come out of Reset.
For application safety, however, it is best to set
IOLOCK and lock the configuration after writing to the
control registers.
Because the unlock sequence is timing critical, it must
be executed as an assembly language routine, in the
same manner as changes to the oscillator configura-
tion. If the bulk of the application is written in C or
another high-level language, the unlock sequence
should be performed by writing inline assembly.
Choosing the configuration requires the review of all
peripheral pin selects and their pin assignments,
especially those that will not be used in the application.
In all cases, unused pin-selectable peripherals should
be disabled completely. Unused peripherals should
have their inputs assigned to an unused RPn pin
function. I/O pins with unused RPn functions should be
configured with the null peripheral output.
The assignment of a peripheral to a particular pin does
not automatically perform any other configuration of the
pin’s I/O circuitry. In theory, this means adding a
pin-selectable output to a pin may mean inadvertently
driving an existing peripheral input when the output is
driven. Users must be familiar with the behavior of
other fixed peripherals that share a remappable pin and
know when to enable or disable them. To be safe, fixed
digital peripherals that share the same pin should be
disabled when not in use.
Along these lines, configuring a remappable pin for a
specific peripheral does not automatically turn that fea-
ture on. The peripheral must be specifically configured
for operation and enabled, as if it were tied to a fixed pin.
Where this happens in the application code (immediately
following device Reset and peripheral configuration or
inside the main application routine) depends on the
peripheral and its use in the application.
DS39881B-page 102
Note:
CONSIDERATIONS FOR
PERIPHERAL PIN SELECTION
In tying peripheral pin select inputs to
RP31, RP31 does not have to exist on a
device for the registers to be reset to it.
Preliminary
A final consideration is that peripheral pin select func-
tions neither override analog inputs, nor reconfigure
pins with analog functions for digital I/O. If a pin is
configured as an analog input on device Reset, it must
be explicitly reconfigured as digital I/O when used with
a peripheral pin select.
Example 9-2 shows a configuration for bidirectional
communication with flow control using UART1. The
following input and output functions are used:
• Input Functions: U1RX, U1CTS
• Output Functions: U1TX, U1RTS
EXAMPLE 9-2:
//*************************************
// Unlock Registers
//*************************************
asm volatile (
//***************************
// Configure Input Functions
// (See Table 9-1)
//***************************
//***************************
// Configure Output Functions
// (See Table 9-2)
//***************************
//*************************************
// Lock Registers
//*************************************
asm volatile ( "MOV
//***************************
// Assign U1RX To Pin RP0
//***************************
RPINR18bits.U1RXR = 0;
//***************************
// Assign U1CTS To Pin RP1
//***************************
RPINR18bits.U1CTSR = 1;
//***************************
// Assign U1TX To Pin RP2
//***************************
RPOR1bits.RP2R = 3;
//***************************
// Assign U1RTS To Pin RP3
//***************************
RPOR1bits.RP3R = 4;
"MOV
"MOV
"MOV
"MOV.b
"MOV.b
"BCLR OSCCON,#6");
"MOV
"MOV
"MOV.b
"MOV.b
"BSET
CONFIGURING UART1
INPUT AND OUTPUT
FUNCTIONS
© 2007 Microchip Technology Inc.
#OSCCON, w1
#0x46, w2
#0x57, w3
w2, <w1>
w3, <w1>
#OSCCON, w1
#0x46, w2
#0x57, w3
w2, <w1>
w3, <w1>
OSCCON, #6"
\n"
\n"
\n"
\n"
\n"
\n"
\n"
\n"
\n"
\n"
);

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