PIC16F1827-I/MV Microchip Technology Inc., PIC16F1827-I/MV Datasheet - Page 297

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PIC16F1827-I/MV

Manufacturer Part Number
PIC16F1827-I/MV
Description
28 UQFN 4x4x0.5mm TUBE, 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enha
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1827-I/MV

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin UQFN
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
Lead Free Status / Rohs Status
RoHS Compliant part
26.3
The Baud Rate Generator (BRG) is an 8-bit or 16-bit
timer that is dedicated to the support of both the
asynchronous and synchronous EUSART operation.
By default, the BRG operates in 8-bit mode. Setting the
BRG16 bit of the BAUDCON register selects 16-bit
mode.
The SPBRGH, SPBRGL register pair determines the
period of the free running baud rate timer. In
Asynchronous mode the multiplier of the baud rate
period is determined by both the BRGH bit of the TXSTA
register and the BRG16 bit of the BAUDCON register. In
Synchronous mode, the BRGH bit is ignored.
Table 26-3
baud rate.
for determining the baud rate and baud rate error.
Typical baud rates and error values for various
asynchronous modes have been computed for your
convenience and are shown in
advantageous to use the high baud rate (BRGH = 1),
or the 16-bit BRG (BRG16 = 1) to reduce the baud rate
error. The 16-bit BRG mode is used to achieve slow
baud rates for fast oscillator frequencies.
Writing a new value to the SPBRGH, SPBRGL register
pair causes the BRG timer to be reset (or cleared). This
ensures that the BRG does not wait for a timer overflow
before outputting the new baud rate.
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit to
make sure that the receive operation is Idle before
changing the system clock.
 2011 Microchip Technology Inc.
EUSART Baud Rate Generator
(BRG)
Example 26-1
contains the formulas for determining the
provides a sample calculation
Table
26-3. It may be
EXAMPLE 26-1:
Calculated Baud Rate
For a device with F
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPBRGH:SPBRGL:
Desired Baud Rate
PIC16(L)F1826/27
Error
X
OSC
=
=
=
=
=
=
=
=
CALCULATING BAUD
RATE ERROR
Calc. Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------- -
----------------------------------------------------------------------- -
64 [SPBRGH:SPBRGL]
--------------------------------------------- 1
9615
----------------------------------
-------------------------------------------- -
Desired Baud Rate
16000000
----------------------- -
----------------------- - 1
-------------------------- -
64 25
16000000
25.042
9615 9600
of 16 MHz, desired baud rate
9600
64
9600
F
+
O S C
64
Desired Baud Rate
1
=
F
25
OS C
DS41391D-page 297
=
0.16%
+
1

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