PIC16F1826-I/SS Microchip Technology Inc., PIC16F1826-I/SS Datasheet - Page 235

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PIC16F1826-I/SS

Manufacturer Part Number
PIC16F1826-I/SS
Description
20 SSOP .209in TUBE, 3.5 KB Flash, 256 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhan
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1826-I/SS

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
15
Interface
I2C/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SSOP
Programmable Memory
3.5K Bytes
Ram Size
256 Bytes
Speed
32 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1826-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 25-4:
25.2.1
The MSSPx module has five registers for SPI mode
operation. These are:
• MSSPx STATUS register (SSPxSTAT)
• MSSPx Control Register 1 (SSPxCON1)
• MSSPx Control Register 3 (SSPxCON3)
• MSSPx Data Buffer register (SSPxBUF)
• MSSPx Address register (SSPxADD)
• MSSPx Shift register (SSPxSR)
SSPxCON1 and SSPxSTAT are the control and STA-
TUS registers in SPI mode operation. The SSPxCON1
register is readable and writable. The lower 6 bits of
the SSPxSTAT are read-only. The upper two bits of the
SSPxSTAT are read/write.
In one SPI master mode, SSPxADD can be loaded
with a value used in the Baud Rate Generator. More
information on the Baud Rate Generator is available in
Section 25.7 “Baud Rate
SSPxSR is the shift register used for shifting data in
and out. SSPxBUF provides indirect access to the
SSPxSR register. SSPxBUF is the buffer register to
which data bytes are written, and from which data
bytes are read.
In receive operations, SSPxSR and SSPxBUF
together create a buffered receiver. When SSPxSR
receives a complete byte, it is transferred to SSPxBUF
and the SSPxIF interrupt is set.
During transmission, the SSPxBUF is not buffered. A
write to SSPxBUF will write to both SSPxBUF and
SSPxSR.
 2011 Microchip Technology Inc.
(Not directly accessible)
SPI MODE REGISTERS
SPI Master
SPI MASTER AND MULTIPLE SLAVE CONNECTION
Generator”.
General I/O
General I/O
General I/O
SDOx
SCKx
SDIx
PIC16(L)F1826/27
SCKx
SDIx
SDOx
SSx
SCKx
SDIx
SDOx
SSx
SCKx
SDIx
SDOx
SSx
SPI Slave
SPI Slave
SPI Slave
#1
#2
#3
DS41391D-page 235

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