ICS1893Y-10LF IDT, Integrated Device Technology Inc, ICS1893Y-10LF Datasheet - Page 55

• Manufacturer Part Number: ICS1893Y-10LF
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893Y-10LF

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: 1893Y-10LF; 800-1935-5; ICS1893Y-10LF

6.5.6 10Base-T Operation: Smart Squelch
6.5.7 10Base-T Operation: Carrier Detection
6.5.8 10Base-T Operation: Collision Detection
ICS1893Y-10 Rev F 1/20/04
Note:
1. An ICS1893Y-10 receives ‘valid data’ when its Twisted-Pair Receiver phase-locked loop can acquire
2. When a link is invalid and the Link Monitor Function detects the presence of data, the ICS1893Y-10
3. Enabling or disabling the Smart Squelch Function affects the Link Monitor function.
4. A transition from the invalid state to the valid state does not automatically update the latching-low Link
The Smart Squelch Function imposes more stringent requirements on the Link Monitor Function regarding
the definition of a valid link, thereby providing a level of insurance that spurious noise is not mistaken for a
valid link during cable installation.
An STA can control the execution of the ICS1893Y-10 Smart Squelch Function using bit 18.0 (the Smart
Squelch Inhibit bit in the 10Base-T Operations Register). When bit 18.0 is logic:
•
•
In 10Base-T mode, an ICS1893Y-10 appends an IDL to the end of each packet during data transmission.
The receiving PHY (that is, the remote link partner) sees this IDL and removes it from the data stream.
The ICS1893Y-10 has a 10Base-T Carrier Detection Function that establishes the state of its Carrier Sense
signal (CRS), based upon the state of its Transmit and Receive state machines. These functions indicate
whether the ICS1893Y-10 is (1) transmitting data, (2) receiving data, or (3) in a collision state (that is, the
ICS1893Y-10 is both transmitting and receiving data on its twisted-pair medium, as defined in the ISO/IEC
8802-3 standard). When the ICS1893Y-10 is configured for:
•
•
The ICS1893Y-10 has a 10Base-T Collision Detection Function that establishes the state of its Collision
Detection signal (COL) based upon both (1) the state of its Receiver state machine and (2) the state of its
Transmit state machine. When the ICS1893Y-10 is operating in:
•
•
Zero (the default), an ICS1893Y-10 enables its Smart Squelch Function. In this case, the Link Monitor
must confirm the presence of both data and a valid IDL at the end of the packet before declaring a link
valid.
One, an ICS1893Y-10 disables or inhibits its Smart Squelch Function. In this case, the Link Monitor does
not have to confirm the presence of an IDL to declare a link valid (that is, the reception of any data is
sufficient).
Half-duplex operations, the ICS1893Y-10 asserts its CRS signal when either transmitting or receiving
data.
Full-duplex operations (or when it is in Repeater mode), the ICS1893Y-10 asserts its CRS signal only
when it is receiving data.
Half-duplex mode, the ICS1893Y-10 asserts its COL signal to indicate it is receiving data while
transmission of data is also in progress.
Full-duplex mode, the ICS1893Y-10 always sets its COL signal to FALSE.
ICS1893Y-10 - Release
lock and extract the receive clock from the incoming data stream for a minimum of three consecutive bit
times.
does not transition the link to the valid state until after the reception of the present packet is complete.
Status bit.
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
55
Chapter 6 Functional Blocks
January, 2004