SIP41103DM-T1 Vishay, SIP41103DM-T1 Datasheet - Page 6

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SIP41103DM-T1

Manufacturer Part Number
SIP41103DM-T1
Description
MOSFET & Power Driver ICs H-Bridge N-Ch MOSFET
Manufacturer
Vishay
Type
High Side/Low Sider
Datasheet

Specifications of SIP41103DM-T1

Rise Time
55 ns
Fall Time
45 ns
Supply Voltage (min)
4.5 V
Supply Current
3 mA
Maximum Power Dissipation
960 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Bridge Type
Half Bridge
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
Number Of Outputs
2
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
SiP41103
Vishay Siliconix
on LX falls below 1 V by the inductor action, the low-
side driver is enabled and OUT
delay. When the signal on PWM goes high, OUT
go low after an internal propagation delay. After the
voltage on OUT
is enabled OUT
tion delay. If LX does not drop below 1 V within 400 ns
after OUT
PWM transition.
Delay
The addition of a capacitor between DELAY and GND
will increase the propagation delay time for OUT
going high. Delay capacitance may be added to pre-
vent shoot-through current in the low-side MOSFET
due to the finite time between OUT
continuing conduction of the low-side MOSFET.
Choose a MOSFET with lower gate resistance to
reduce this effect. If necessary, choose a capacitor
value that prevents MOSFET conduction under worst-
case temperature and manufacturing conditions. Prop-
agation delay is increased according to the ratio of
1.2 ns/pF.
Synchronous MOSFET Enable
Under light load conditions, efficiency can be
increased by disabling the synchronous MOSFET,
thus avoiding the gate charge losses of the synchro-
nous MOSFET. When EN
TYPICAL CHARACTERISTICS
www.vishay.com
6
50
40
30
20
10
0
H
0
goes low, OUT
H
L
I
will go high after an internal propaga-
DD
drops below 1 V the high-side driver
1
1 MHz
vs. C
LOAD
SYNC
L
2
C
is forced high until the next
LOAD
vs. Frequency
L
is low, OUT
(nF)
goes high after some
500 kHz
3
L
going low and the
200 kHz
4
L
is forced
L
5
will
H
low. When high, the low-side driver operates normally.
EN
Shutdown
The driver enters shutdown mode when a period of
inactivity on PWM elapses. Shutdown current is less
than 1 µA.
V
MOSFET drivers draw large peak currents from the
supplies when they switch. A local bypass capacitor is
required to supply this current and reduce power sup-
ply noise. Connect a 1 µF ceramic capacitor as close
as practical between the V
Undervoltage Lockout
Undervoltage lockout prevents control of the circuit
until the supply voltages reach valid operating levels.
The UVLO circuit forces OUT
V
forces OUT
and LX is below the specified voltage.
Thermal Protection
If the temperature rises above 165 °C, the thermal pro-
tection disables the drivers. The drivers are re-enabled
after the temperature has decreased below 140 °C.
DD
DD
SYNC
Bypass Capacitor
is below its specified voltage. A separate UVLO
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
should be driven by a 5-V signal.
0
H
High Side Turn On Delay vs. C
10
low when the voltage between BOOT
20
30
40
DD
C
50
Delay
L
and GND pins.
and OUT
60
S-61692–Rev. E, 04-Sep-06
(pF)
Document Number: 72718
70
80
DELAY
H
90 100 110
to low when

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