T6819-TBQY Atmel, T6819-TBQY Datasheet - Page 6

• Manufacturer Part Number: T6819-TBQY
• Description: MOSFET & Power Driver ICs Dual Triple Driver w/PWM Ctrl.
• Manufacturer: Atmel
• Type: High Side/Low Sider

Specifications of T6819-TBQY

• Product: Half-Bridge Drivers
• Rise Time: 100 ns
• Fall Time: 100 ns
• Supply Voltage (min): 5.6 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC
• Bridge Type: Half Bridge, H Bridge
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 6
• Number Of Outputs: 6
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.2
3.3
3.4
3.5
3.6
6
Power-supply Fail
Open-load Detection
Overtemperature Protection
Short-circuit Protection
Inhibit
T6819/ATA6829
In case of undervoltage at pin VS, the Power-Supply Fail bit (PSF) in the output register is set
and all outputs are disabled. To detect an undervoltage, its duration has to last longer than the
undervoltage detection delay time t
age recovers normal operation value. The PSF bit stays high until it is reset by the SRR bit in the
input register.
If the open-load detection bit (OLD) is set to low, a pull-up current for each high-side switch and
a pull-down current for each low-side switch is turned on (open-load detection current I
the current through the external load does not reach the open-load detection current, the corre-
sponding bit of the output in the output register is set to high.
Switching on an output stage with OLD bit set to low disables the open-load function for this
output.
If the junction temperature of one ore more output stages exceeds the thermal prewarning
threshold, T
temperature falls below the thermal prewarning threshold, T
bit can be read without transferring a complete 16-bit data word. The status of TP is available at
pin DO with the falling edge of CS. After the microcontroller has read this information, CS is set
high and the data transfer is interrupted without affecting the status of input and output registers.
If the junction temperature of an output stage exceeds the thermal shutdown threshold,
T
low. Additional the overload detection bit (OVL) in the output register is set. The output can be
enabled again when the temperature falls below the thermal shutdown threshold, T
the SRR bit in the input register is set to high. Hysteresis of thermal prewarning and shutdown
threshold avoids oscillations.
The output currents are limited by a current regulator. Overcurrent detection is activated by writ-
ing a high to the OCS bit in the input register. When the current in an output stage exceeds the
overcurrent limitation and shut-down threshold, it is switched off after a delay time (t
over-load detection bit (OVL) is set and the corresponding status bit in the output register is set
to low. For OCS = low the overcurrent shutdown is inactive and the OVL bit is not set by an over-
current. By writing a high to the SRR bit in the input register the OVL bit is reset and the disabled
outputs are enabled.
The SI bit in the input register has to be set to zero to inhibit the T6819/ATA6829.
All output stages are then turned off but the serial interface stays active. The current consump-
tion is reduced to less than 5 µA at pin VS and less than 100 µA at pin VCC. The output stages
can be activated again by bit SI = 1.
j switch off
, the affected output is disabled and the corresponding bit in the output register is set to
jPW set
, the temperature prewarning bit (TP) in the output register is set. When the
dUV
. The outputs are enabled immediately when supply volt-
jPW reset
, the bit TP is reset. The TP
4531F–BCD–09/05
jswitch on
dSd
OUT1-3
). The
and
). If