PIC32MX440F128LT-80V/BG Microchip Technology, PIC32MX440F128LT-80V/BG Datasheet - Page 77

• Manufacturer Part Number: PIC32MX440F128LT-80V/BG
• Description: 128 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x10x1.20mm
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F128LT-80V/BG

• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 32 KB
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: XBGA-121
• Operating Temperature Range: - 40 C to + 105 C
• Supply Current (max): 10 mA
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: -
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

TABLE 4-35:
TABLE 4-36:
Legend:
Note
Legend:
Note
61C0
61D0
61E0
61C0
61D0
61E0
1:
1:
CNCON
CNCON
CNPUE
CNPUE
CNEN
CNEN
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0 CNPUE15 CNPUE14 CNPUE13 CNPUE12 CNPUE11 CNPUE10
15:0
15:0
15:0 CNPUE15 CNPUE14 CNPUE13 CNPUE12 CNPUE11 CNPUE10
CHANGE NOTICE AND PULL-UP REGISTERS MAP FOR PIC32MX320F128L, PIC32MX340F128L, PIC32MX360F256L,
PIC32MX360F512L, PIC32MX440F128L, PIC32MX460F256L AND PIC32MX460F512L DEVICES ONLY
CHANGE NOTICE AND PULL-UP REGISTERS MAP FOR PIC32MX320F032H, PIC32MX320F064H, PIC32MX320F128H,
PIC32MX340F128H, PIC32MX340F256H, PIC32MX340F512H, PIC32MX420F032H, PIC32MX440F128H, PIC32MX440F256H
AND PIC32MX440F512H DEVICES ONLY
CNEN15
CNEN15
31/15
31/15
ON
ON
—
—
—
—
—
—
CNEN14
CNEN14
30/14
30/14
—
—
—
—
—
—
—
—
CNEN13
CNEN13
29/13
29/13
SIDL
SIDL
—
—
—
—
—
—
CNEN12
CNEN12
28/12
28/12
—
—
—
—
—
—
—
—
CNEN11
CNEN11
27/11
27/11
—
—
—
—
—
—
—
—
CNEN10
CNEN10
26/10
26/10
(1)
—
—
—
—
—
—
—
—
CNPUE9
CNPUE9
CNEN9
CNEN9
25/9
25/9
—
—
—
—
—
—
—
—
CNPUE8
CNPUE8
CNEN8
CNEN8
24/8
24/8
—
—
—
—
—
—
—
—
Bits
Bits
CNPUE7
CNPUE7
CNEN7
CNEN7
23/7
23/7
—
—
—
—
—
—
—
—
CNPUE6
CNPUE6
CNEN6
CNEN6
22/6
22/6
—
—
—
—
—
—
—
—
CNPUE21
CNPUE5
CNPUE5
CNEN21
CNEN5
CNEN5
21/5
21/5
—
—
—
—
—
—
CNPUE20
CNEN20
CNPUE4
CNPUE4
CNEN4
CNEN4
20/4
20/4
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
CNPUE19 CNPUE18 CNPUE17 CNPUE16 0000
CNEN19
CNPUE3
CNPUE3
CNEN3
CNEN3
19/3
19/3
—
—
—
—
—
—
CNPUE18 CNPUE17 CNPUE16 0000
CNEN18
CNPUE2
CNEN18
CNPUE2
CNEN2
CNEN2
(1)
18/2
18/2
—
—
—
—
CNPUE1
CNPUE1
CNEN17
CNEN17
CNEN1
CNEN1
17/1
17/1
—
—
—
—
CNPUE1
CNPUE1
CNEN16
CNEN16
CNEN0
CNEN0
16/0
16/0
—
—
—
—
for more
for more
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000