PIC32MX460F256LT-80V/BG Microchip Technology, PIC32MX460F256LT-80V/BG Datasheet - Page 91

• Manufacturer Part Number: PIC32MX460F256LT-80V/BG
• Description: 256 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x10x1.20mm
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F256LT-80V/BG

• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 32 KB
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: XBGA-121
• Operating Temperature Range: - 40 C to + 105 C
• Supply Current (max): 10 mA
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: -
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

TABLE 7-1:
© 2011 Microchip Technology Inc.
SPI2E – SPI2 Fault
SPI2TX – SPI2 Transfer Done
SPI2RX – SPI2 Receive Done
U2E – UART2 Error
U2RX – UART2 Receiver
U2TX – UART2 Transmitter
I2C2B – I2C2 Bus Collision Event
I2C2S – I2C2 Slave Event
I2C2M – I2C2 Master Event
FSCM – Fail-Safe Clock Monitor
RTCC – Real-Time Clock and
Calendar
DMA0 – DMA Channel 0
DMA1 – DMA Channel 1
DMA2 – DMA Channel 2
DMA3 – DMA Channel 3
FCE – Flash Control Event
USB
Note 1:
Interrupt Source
Not all interrupt sources are available on all devices. See
Features”
Highest Natural Order Priority
INTERRUPT IRQ AND VECTOR LOCATION (CONTINUED)
and
(1)
TABLE 2: “PIC32MX USB – Features”
IRQ
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
56
57
Lowest Natural Order Priority
Number
Vector
31
31
31
32
32
32
33
33
33
34
35
36
37
38
39
44
45
IFS1<10>
IFS1<12>
IFS1<13>
IFS1<14>
IFS1<15>
IFS1<16>
IFS1<17>
IFS1<18>
IFS1<19>
IFS1<24>
IFS1<25>
IFS1<11>
IFS1<5>
IFS1<6>
IFS1<7>
IFS1<8>
IFS1<9>
Flag
for available peripherals.
TABLE 1: “PIC32MX General Purpose –
PIC32MX3XX/4XX
IEC1<10>
IEC1<11>
IEC1<12>
IEC1<13>
IEC1<14>
IEC1<15>
IEC1<16>
IEC1<17>
IEC1<18>
IEC1<19>
IEC1<24>
IEC1<25>
IEC1<5>
IEC1<6>
IEC1<7>
IEC1<8>
IEC1<9>
Enable
Interrupt Bit Location
IPC11<12:10>
IPC7<28:26>
IPC7<28:26>
IPC7<28:26>
IPC8<12:10>
IPC8<12:10>
IPC8<12:10>
IPC8<20:18>
IPC8<28:26>
IPC9<20:18>
IPC9<28:26>
IPC9<12:10>
IPC11<4:2>
IPC8<4:2>
IPC8<4:2>
IPC8<4:2>
IPC9<4:2>
Priority
DS61143H-page 91
IPC7<25:24>
IPC7<25:24>
IPC7<25:24>
IPC8<17:16>
IPC8<25:24>
IPC9<17:16>
IPC9<25:24>
IPC11<1:0>
IPC11<9:8>
Subpriority
IPC8<1:0>
IPC8<1:0>
IPC8<1:0>
IPC8<9:8>
IPC8<9:8>
IPC8<9:8>
IPC9<1:0>
IPC9<9:8>