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PRODUCT DESCRIPTION
The AD53513 is a quad high-speed pin driver designed for use
in digital or mixed-signal test systems. Combining a high-speed
monolithic process with a convenient surface-mount package,
this product attains superb electrical performance while preserving
optimum packaging densities and long-term reliability in a
100-lead, LQFP package with built-in heat sink.
Featuring unity gain programmable output levels of –2.5 V to
+5.5 V, with output swing capability of less than 200 mV to
8 V, the AD53513 is designed to stimulate ECL, TTL, and
CMOS logic families, as well as high-speed memory. The
1.0 Gb/s data rate capacity and matched output impedance
allow for real-time stimulation of these digital logic families.
To test I/O devices, the pin driver can be switched into a high
impedance state (Inhibit Mode), electrically removing the driver
from the path. The pin driver leakage current in inhibit is typically
100 nA and output charge transfer entering inhibit is typically less
than 20 pC.
The AD53513 transition from HI/LO or to inhibit is controlled
through the data and inhibit inputs. The input circuitry uses
high-speed differential inputs with a common-mode range of
± 2 V. This allows for direct interface to precision differential
ECL timing. The analog logic HI/LO inputs are equally easy
to interface. Typically requiring 10 µA of bias current, the
AD53513 can be directly coupled to the output of a digital-
to-analog converter.
Each channel of the AD53513 has a Mode Select Pin RLD,
which is a single-sided logic input. The logic threshold is set by
Quad Ultrahigh-Speed Pin Driver
the VBB input which is common to all four channels. The RLD
Mode Select controls whether inhibit puts the driver in High-Z
or V
(DATA, DATAB, INH, INHB, RLD, VBB), must share a
common set of logic levels. The VBB threshold should be set to
the midrange of the logic levels. For example, if ECL levels of
–0.8 V to –1.8 V are used, VBB should be set to –1.3 V.
The AD53513 is available in a 100-lead, LQFP package with a
built-in heat sink and is specified to operate over the ambient
commercial temperature range of –25°C to +85°C.
DATAB2
DATAB3
DATAB1
DATAB4
VCC
DATA2
DATA3
DATA4
DATA1
INHB2
INHB3
INHB1
INHB4
RLD2
RLD3
RLD4
RLD1
TERM
INH2
INH3
INH4
INH1
VBB
VBB
VBB
VBB
VH2
VH3
VH1
VL2
VT2
VL3
VT3
VH4
VL1
VT1
VL4
VT4
with High-Z and V
GND GND
mode. (Refer to Table I.) All of the digital logic inputs
DRIVER 1
DRIVER 3
DRIVER 2
DRIVER 4
FUNCTIONAL BLOCK DIAGRAM
GND
AD53513
GND GND
ROUT
ROUT
ROUT
ROUT
20
20
20
20
VHDCPL1
VHDCPL2
VHDCPL4
VOUT1
VLDCPL1
VOUT2
VLDCPL2
VHDCPL3
VOUT4
VLDCPL4
VOUT3
VLDCPL3
1.0 A/K
AD53513
TERM
39nF
39nF
39nF
39nF
39nF
39nF
39nF
39nF
30
30
30
30
THERM
TVCC
Modes
50
50
50
50
VEE