BU1425AKV Rohm Semiconductor, BU1425AKV Datasheet - Page 32

• Manufacturer Part Number: BU1425AKV
• Description: IC ENCODER NTSC/PAL DGTL VQFP64
• Manufacturer: Rohm Semiconductor
• Type: NTSC/PAL Encoderr

Specifications of BU1425AKV

• Applications: Video
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 20
•
32
Multimedia ICs
BU1425AK
Reversal of the U and V timing using the H / L state of TEST[2] can be controlled regardless of whether CLKSW is
HIGH or LOW (the input clock is a doubled clock or not).
When using the RGB input mode, TEST[2] should be fixed at LOW.
In the Master mode, HSYNC is output at the timing shown in Fig. 26. For that reason, the timing of U and V should
be determined by counting from that falling edge. In the Slave mode, the HSY, U, and V data should be input at the
timing shown in Fig. 26.
External dimensions (Units: mm)
TEST2
(pin26)
0
0
1
1
49
64
48
0.8
1
QFP-A64
16.4
14.0
0.3
0.2
0.35
33
CLKSW
16
(pin53)
32
17
0.1
0
1
0
1
0.15
0.15
0.1
In a doubled clock mode, the timing of U and V is as shown in Fig. 7-1.
In a regular clock mode, the timing of U and V is as shown in Fig. 7-1.
In a doubled clock mode, the timing of U and V is as shown in Fig. 7-2.
In a regular clock mode, the timing of U and V is as shown in Fig. 7-2.
BU1425AKV
49
64
BU1425AK / BU1425AKV
0.5
48
1
12.0
10.0
VQFP64
0.3
0.2
0.2
33
16
32
17
0.1
0.1
0.125
0.1