MCP23008-E/ML Microchip Technology, MCP23008-E/ML Datasheet - Page 17

• Manufacturer Part Number: MCP23008-E/ML
• Description: IC I/O EXPANDER I2C 8B 20QFN
• Manufacturer: Microchip Technology

Specifications of MCP23008-E/ML

• Interface: I²C
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 1.7MHz
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Includes: POR
• Chip Configuration: 8 Bit
• Bus Frequency: 1.7MHz
• Ic Interface Type: I2C, Serial
• No. Of I/o's: 8
• Supply Voltage Range: 4.5V To 5.5V
• Digital Ic Case Style: QFN
• No. Of Pins: 20
• Termination Type: SMD
• Rohs Compliant: Yes
• Filter Terminals: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

1.6.8
The INTF register reflects the interrupt condition on the
port pins of any pin that is enabled for interrupts via the
GPINTEN register. A ‘set’ bit indicates that the
associated pin caused the interrupt.
This register is ‘read-only’. Writes to this register will be
ignored.
REGISTER 1-8:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
INT7
R-0
INTERRUPT FLAG (INTF)
REGISTER
INT7:INT0: These bits reflect the interrupt condition on the port. Will reflect the change only if interrupts
are enabled (GPINTEN) <7:0>.
1 = Pin caused interrupt.
0 = Interrupt not pending.
INT6
R-0
INTF – INTERRUPT FLAG REGISTER (ADDR 0x07)
W = Writable bit
‘1’ = Bit is set
INT5
R-0
INT4
R-0
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
MCP23008/MCP23S08
INT3
R-0
Note:
INTF will always reflect the pin(s) that
have an interrupt condition. For example,
one pin causes an interrupt to occur and is
captured in INTCAP and INF. If before
clearing the interrupt another pin changes,
which would normally cause an interrupt, it
will be reflected in INTF, but not INTCAP.
INT2
R-0
x = Bit is unknown
INT1
R-0
DS21919E-page 17
INT0
R-0
bit 0