DS8113-RNG+ Maxim Integrated Products, DS8113-RNG+ Datasheet - Page 10

• Manufacturer Part Number: DS8113-RNG+
• Description: IC INTERFACE SMART CARD 28-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS8113-RNG+

• Applications: Smart Card
• Interface: Analog
• Voltage - Supply: 2.7 V ~ 6 V
• Package / Case: 28-SOIC (7.5mm Width)
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If the card is in the reader (if PRES is active), the host
microcontroller can begin an activation sequence (start
a card session) by pulling CMDVCC low. The following
events form an activation sequence (Figure 3):
To apply the clock to the card interface:
Smart Card Interface
Figure 3. Activation Sequence Using RSTIN and CMDVCC
10
1) CMDVCC is pulled low.
2) The internal oscillator changes to high frequency (t
3) The voltage generator is started (between t
4) V
5) I/O, AUX1, and AUX2 are enabled (t
6) The CLK signal is applied to the C3 contact (t
7) RST is enabled (t
1) Set RSTIN high.
______________________________________________________________________________________
trolled slope (t
internal oscillator period (approximately 25µs).
(they were previously pulled low).
CC
CMDVCC
rises from 0 to 5V, 3V, or 1.8V with a con-
RSTIN
I/OIN
VCC
CLK
RST
I/O
2
= t
5
= t
1
+ 1.5 × T). T is 64 times the
1
+ 7T).
t
0
t
1
t
2
3
= t
t
3
0
and t
1
+ 4T)
4
).
1
0
t
).
4
).
t
5
If the applied clock is not needed, set CMDVCC low
with RSTIN low. In this case, CLK starts at t
200ns after the transition on I/O, see Figure 4); after t
RSTIN can be set high to obtain an answer to request
(ATR) from an inserted smart card. Do not perform acti-
vation with RSTIN held permanently high.
When the activation sequence is completed, the
DS8113 card interface is in active mode. The host
microcontroller and the smart card exchange data on
the I/O lines.
= t
ACT
2) Set CMDVCC low.
3) Set RSTIN low between t
4) RST stays low until t
5) RSTIN has no further effect on CLK after t
of RSTIN.
5
, then RST becomes the copy
3
and t
5
Active Mode
; CLK will now start.
ATR
3
(minimum
5
.
5
,