W83697UG Nuvoton Technology Corporation of America, W83697UG Datasheet - Page 32

• Manufacturer Part Number: W83697UG
• Description: IC LPC SUPER I/O 128-PQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697UG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant

CRF0 (Default 0x0E)
FDD Mode Register
CRF1 (Default 0x00)
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3 - 2 Interface Mode
Bit 1:
Bit 0:
Bit 7 - 6: Boot Floppy
Bit [5:4]: Media ID1, Media ID0. These bits will be reflected on FDC's Tape Drive Register bit 7, 6.
FIPURDWN
This bit controls the internal pull-up resistors of the FDC input pins RDATA, INDEX,
TRAK0, DSKCHG, and WP.
0
1
INTVERTZ
This bit determines the polarity of all FDD interface signals.
0
1
DRV2EN (PS2 mode only)
When this bit is a logic 0, indicates a second drive is installed and is reflected in status
register A.
Swap Drive 0, 1 Mode
0
1
11
10
01
00
FDC DMA Mode
0
1
Floppy Mode
0
1
00
01
10
11
The internal pull-up resistors of FDC are turned on.(Default)
The internal pull-up resistors of FDC are turned off.
FDD interface signals are active low.
FDD interface signals are active high.
No Swap (Default)
Drive and Motor select 0 and 1 are swapped.
AT Mode (Default)
(Reserved)
PS/2
Model 30
Burst Mode is enabled
Non-Burst Mode (Default)
Normal Floppy Mode (Default)
Enhanced 3-mode FDD
FDD A
FDD B
FDD C
FDD D
- 32 -
W83697UF/W83697UG