BD6762FV-E2 Rohm Semiconductor, BD6762FV-E2 Datasheet - Page 16

• Manufacturer Part Number: BD6762FV-E2
• Description: IC MOTOR DRIVER N-CH SSOP-B40
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of BD6762FV-E2

• Applications: 3-Phase, Brushless Motor Driver
• Evaluation Tools: *
• Number Of Outputs: 1
• Current - Output: -
• Voltage - Load: 16 V ~ 28 V
• Voltage - Supply: 16 V ~ 28 V
• Operating Temperature: -25°C ~ 75°C
• Mounting Type: Surface Mount
• Package / Case: 40-SSOP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

© 2010 ROHM Co., Ltd. All rights reserved.
BD6761FS,BD6762FV
www.rohm.com
7)
8)
9)
10) Start/stop circuit (BD6762FV)
11) Low voltage protection circuit (BD6761FS and BD6762FV)
12) Built-in 120° slope PWM logic (BD6762FV)
High-side gate
Low-side gate
Output simultaneous on prevention circuit (BD6761FS, BD6762FV)
When the low-side gate voltage becomes high while the high-side gate voltage is low, or when the high-side gate
voltage becomes high while the low-side gate voltage is low, the simultaneous on prevention time is provided with t=3.2
s (TYP value). When the input capacity of external FET is C and the gate connection resistor is R, set R to satisfy the
following equation so that the simultaneous on prevention time as mentioned above is not exceeded.
Short brake (BD6761FS and BD6762FV)
BD6761FS operates the short brake action with the ACC and DEC pins set to low, and BD6762FV does with the SB pin set to
OPEN or high. At the time of short brake, the high-side gate is turned off and the low-side is turned on. At the time of short
brake operating, the current flows to the output FET, which is decided by the motor's counter electromotive voltage and coil
impedance. Since this current flows via path which does not run through the overcurrent protection (current limit) detection
resistor, the overcurrent protection does not operate as IC operating. Therefore, the current more than the overcurrent
protection set current may flow to the output FET, pay attention so that it does not exceed the output FET rating.
Forward/reverse rotation circuit (BD6761FS and BD6762FV)
Forward /reverse rotation of motor can be switched according to the FR pin input conditions. Logics of the hall input and
output conditions according to the FR pin input conditions are shown in the I/O conditions table (P.10). If the FR pin is
switched during the motor rotation, since the simultaneous on prevention circuit in IC operates, the feed through current
does not flow. However, since the motor current flows in the direction to the power source due to the electromotive force,
the voltage may be raised if the power source does not have the power supply voltage absorption ability. Examine the
capacitor characteristics between the power supply and ground sufficiently and then pay attention so that the power
supply voltage and step-up voltage do not exceed the absolute maximum ratings. When the physical measures are
taken such as increasing the capacitor value which is connected between the power supply and ground, check the
characteristics enough prior to use.
When the ST/SP pin is in the sate of OPEN or high, IC becomes standby. In the case of standby, some circuits operation
are turned off to reduce the current consumption.
When the ST/SP pin is in the state of low, IC becomes operating.
This IC builds in the low voltage protection circuit. When VCC becomes lower than 11.5 V (Typ.), the high-side and
low-side gates are both turned off to make the coil turn off. Protection off voltage is 12.0 V (Typ.) and hysteresis width is
0.5 V (Typ.).Since the motor locking protection detection circuit operates in BD6762FV during the low voltage protection
operation, if the low voltage protection operating time becomes longer than the motor locking protection detection time,
the operation moves to the motor locking protection operation after the low voltage protection operation.
It is possible to perform 120° drive by setting 120/SL pin to OPEN or making high. 120° slope drive is possible by setting
the 120/SL pin to OPEN or making high. Low noise design is realized by reducing the electromagnetic sound generated
at the time of phase switching by means of gradually changing the output PWM on-duty during 120° slope energization.
However, at the time of startup or the hall input frequency is lower than about 3 Hz (Typ. value), it becomes 120° drive.
When the hall input frequency is more than about 3 Hz (Typ. value) and the rise of hall U-phase is detected 7 times, it
switches to the 120° slope drive.
Check that the simultaneous on is not made in the actual operation and then set C and R.
C
≦
10 ×( 24 + R )
t
1.8µ
Fig.13 High/Low-side Simultaneous On Prevention Timing Chart
t
t
16/22
t
t
t
Technical Note
2010.06 - Rev.A