DS33M31N+ Maxim Integrated Products, DS33M31N+ Datasheet - Page 11

• Manufacturer Part Number: DS33M31N+
• Description: IC MAPPER ETHERNET 256CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33M31N+

• Applications: Data Transport
• Interface: SPI
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 256-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.3.8.7 Async DS3/E3 Mapper/Synchronizer
Rev: 111908
___________________________________________________ DS33M30/M31/M33 ABRIDGED DATA SHEET
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Synchronization of DS3/E3 serial streams from SONET/SDH STS-1 SPE/VC-3 accommodating
asynchronous timing between the DS3/E3 line/tributary and the STS-3/STM-1 references, through
appropriate processing of bit stuffing and pointer justifications
Full integration of the DS3/E3 desynchronization and PLL circuitry necessary to produce smooth DS3/E3
data and clock signals that meet the Telcordia (GR-253-CORE and GR-499-CORE), ANSI (T1-105.03-
1994 and T1-105.03b-1997), and ITU (G.825e and O.172e) jitter and wander requirements. Desynchronize
circuitry includes clock smoother consisting of onboard analog/digital control modulators, analog/digital
filters, and frequency detectors
Absorption of SONET/SDH pointer justifications and DS3/E3 payload bit stuffs in an elastic store, and
controlling outgoing clock phase using the smooth clock generator circuit with selectable lock and fast lock
modes of operation
Tolerating frequency offsets up to ±200ppm between the inbound Add Telecom Bus clock (ACLK) and the
free-running DS3/E3 reference clocks generated by the internal Clock Rate Adapter
Monitoring and detection of the stability of the recovered DS3 clocks with frequency offset indications of
±20, ±100, and ±200ppm and the elastic store FIFO underflow/overflow conditions. The elastic store has
an auto center mechanism that separates the read and write pointers under normal operating conditions
and after underflow/overflow events occur
Programmable frequency out of range indication (±10, ±20, ±40, or ±100ppm)
Selectable lock and fast lock modes of operation
Maximum lock time for the smooth recovered/output DS3/E3 data and clock that is demapped from
SONET/SDH is 1.06ms (10 DS3, 24 G.751 E3, or nine G.832 E3 frames) (switch time to valid DS3 with a
smooth clock)
Controls include enables/disables/settings for serial data type, and demapping mode
Synchronization of DS3/E3 serial streams to SONET/SDH STS-1 SPE/VC-3 accommodating
asynchronous timing between the DS3/E3 line/tributary and the STS-3/STM-1 references, through bit
stuffing
Accommodation of frequency offsets up to +200ppm between the 155.52Mbps inbound add STS-3/STM-1
serial data stream and the 44.736/34.368MHz line/tributary DS3/E3 clock (RLCLKn)
Elastic store overflow and underflow conditions
Programmable frequency out of range indication (±10, ±20, ±40, or ±100ppm)
SONET mapping jitter conforming to GR-253 and GR-499 and SDH mapping jitter compliant to ITU G.707,
G.825e and O.172e
Mapping of DS3/E3 serial data stream into an STS-1 SPE compliant to Telcordia GR-253 or VC-3
compliant to ITU G.707
Standard SONET STS-1 mapping for DS3/E3 conforming to Telcordia GR-253 and GR-499
Standard SDH VC-3 mapping for DS3/E3 conforming to ITU-T G.707
All combinations of DS3 or E3 mapping configuration into STS-1, AU-3, or TU-3/AU-4 are possible
Software configuration for SONET/SDH mapping on a per tributary basis
Software configuration for all fixed stuff bits to zeros or ones
Controls include enables/disables/settings for mapping type, alarm insertion, stuff bits, frequency offset
(±100ppm to ±200ppm)
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