DS33M31N+ Maxim Integrated Products, DS33M31N+ Datasheet - Page 16

IC MAPPER ETHERNET 256CSBGA

DS33M31N+

Manufacturer Part Number
DS33M31N+
Description
IC MAPPER ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33M31N+

Applications
Data Transport
Interface
SPI
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.7.1 Ethernet MAC Interface
1.7.2 Ethernet Bridging for 10/100
1.7.3 Ethernet Traffic Classification
1.7.4 Ethernet Traffic Profiling and Policing
1.7.5 Ethernet Traffic Scheduling
1.7.6 Ethernet Control Frame Processing
1.7.7 Q-in-Q
1.8
1.9
Rev: 111908
___________________________________________________ DS33M30/M31/M33 ABRIDGED DATA SHEET
One E/FE/GbE port (MII/RMII/GMII)
10Mbps/100Mbps/1000Mbps data rates
Support for DTE or DCE operation
Half- and full-duplex flow control per IEEE 802.3
Jumbo frame lengths up to 10KB for GbE
64-byte minimum frame size
Ethernet management interface (MDIO)
Supports applicable RMON (RFC2819) counters
Promiscuous and broadcast discard modes
OAM frames can be intercepted, processed by host software, and responses inserted
4K address and VLAN ID lookup table for learning and filtering
Programmable aging between one to 300 seconds in one-second intervals
Ingress classification according to Ethernet COS
Programmable class map to four queues for each Ethernet port
Ingress classification by PCP or DSCP
Programmable class mapping to four queues
Programmable bandwidth profiling at either the port level or per-class level
Programmable bandwidth profiling for multicast and broadcast flows
Policing with programmable CIR/CBS
Nonconforming Ethernet frames discarded according to the configured BW profile
Programmable scheduler for Ethernet flows toward PDH port(s):
Control frames, except PAUSE and OAM, are forwarded without processing
PAUSE and OAM frames can be programmed to be intercepted, discarded or forwarded
Programmable carrier VLAN tag insertion
SDRAM Interface
Interface for up to 256Mb DDR SDRAM (JEDEC JESD79D compliant)
Compatible with DDR266+
16-bit-wide data bus with dual edge transfers and auto refresh timing
SDRAM interface clock output of 125MHz
Direct connection to external DDR SDRAM
Example devices: Micron MT46V16M16, Samsung K4H561638F and Hynix HY5DU561622CF
Clock Rate Adapter (CLAD)
Creates DS3, E3, STS-1, and/or telecom bus clocks from single-input reference clock
Input reference clock to CLAD can be 77.76, 51.84, 44.736, 34.368, or 19.44MHz
o
o
Strict priority, or
Weighted queuing
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