AD9396KSTZ-100 Analog Devices Inc, AD9396KSTZ-100 Datasheet - Page 26

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AD9396KSTZ-100

Manufacturer Part Number
AD9396KSTZ-100
Description
IC INTERFACE 100MHZ DVI 100LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9396KSTZ-100

Applications
Video
Interface
Analog, DVI
Voltage - Supply
3.15 V ~ 3.47 V
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9396
Hex
Address
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
Read/Write
or Read Only
Read
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Bits
[6]
[5]
[4]
[7:4]
[3:0]
[7]
[6]
[5:0]
[7]
[6]
[5:0]
[7:6]
[5]
[4]
[3]
[2]
[1]
[6:5]
[4:0]
[7:0]
[4:0]
[7:0]
Default
Value
*0******
**0*****
***0****
1001****
****0110
0*******
*0******
**001101
1*******
*0******
**010101
10******
**0*****
***0****
****0***
*****0**
******0*
*01* ****
***01100
01010010
***01000
00000000
Register Name
DVI Content
Encrypted
DVI HSYNC
Polarity
DVI VSYNC
Polarity
MV Pulse Max
MV Pulse Min
MV Oversample
En
MV Pal En
MV Line Count
Start
MV Detect Mode
MV Settings
Override
MV Line Count
End
MV Pulse Limit
Set
Low Freq Mode
Low Freq
Override
Up Conversion
Mode
CrCb Filter Enable
CSC_Enable
CSC_Mode
CSC_Coeff_A1
MSB
CSC_Coeff_A1
CSC_Coeff_A2
MSB
CSC_Coeff_A2 LSB
Rev. 0 | Page 26 of 48
Description
This bit is high when HDCP decryption is in use (content is
protected). The signal goes low when HDCP is not being used.
Customers can use this bit to determine whether to allow copying
of the content. The bit should be sampled at regular intervals
because it can change on a frame by frame basis.
Returns DVI HSYNC polarity.
Returns DVI VSYNC polarity.
Sets the maximum pseudo sync pulse width for Macrovision
detection.
Sets the minimum pseudo sync pulse width for Macrovision
detection.
Tells the Macrovision detection engine whether oversampling is in
use.
Tells the Macrovision detection engine to enter PAL mode.
Sets the start line for Macrovision detection.
0 = standard definition.
1 = progressive scan mode.
0 = use hard coded settings for line counts and pulse widths.
1 = use I
Sets the end line for Macrovision detection.
Sets the number of pulses required in the last 3 lines (SD mode
only).
Sets whether the Audio PLL is in low frequency mode. Low
frequency mode should only be set for pixel clocks <80 MHz.
Allows the previous bit to be used to set low frequency mode
rather than the internal auto-detect.
0 = repeat Cr and Cb values.
1 = interpolate Cr and Cb values.
Enables the FIR filter for 4:2:2 CrCb output.
Enables the color space converter (CSC). The default settings for the
CSC provide HDTV-to-RGB conversion.
Sets the fixed point position of the CSC coefficients, including the
A4, B4, and C4 offsets.
00 = ±1.0, −4096 to +4095.
01 = ±2.0, −8192 to +8190.
1× = ±4.0, −16384 to +16380.
MSB, Register 0x36.
Color space converter (CSC) coefficient for equation:
R
G
B
MSB, Register 0x38.
CSC coefficient for equation:
R
G
B
OUT
OUT
B
OUT
OUT
B
OUT
OUT
= (A1 × R
= (C1 × R
= (A1 × R
= (C1 × R
= (B1 × R
= (B1 × R
2
C values for these settings.
IN
IN
IN
IN
IN
IN
) + (C2 × G
) + (C2 × G
) + (A2 × G
) + (B2 × G
) + (B2 × G
+ (A2 × G
IN
IN
IN
IN
IN
IN
) + (A3 × B
) + (C3 × B
) + (C3 × B
) + (B3 × B
) + (B3 × B
) + (A3 × B
IN
IN
IN
IN
IN
IN
) + A4
) + B4
) + C4
) + B4
) + C4
) + A4

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