ALD4701ASB Advanced Linear Devices Inc, ALD4701ASB Datasheet - Page 4

• Manufacturer Part Number: ALD4701ASB
• Description: Op Amps Micropower
• Manufacturer: Advanced Linear Devices Inc

Specifications of ALD4701ASB

• Number Of Channels: 4
• Voltage Gain Db: 109.54 dB
• Common Mode Rejection Ratio (min): 65 dB
• Input Offset Voltage: 2 mV
• Operating Supply Voltage: 3 V, 5, V, 9 V
• Supply Current: 1 mA
• Maximum Power Dissipation: 5 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-14
• Maximum Dual Supply Voltage: +/- 6 V
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: No

Design & Operating Notes:
1. The ALD4701 CMOS operational amplifier uses a 3 gain stage
2. The ALD4701 has complementary p-channel and n-channel input
3. The input bias and offset currents are essentially input protection
ALD4701A/ALD4701B
ALD4701
architecture and an improved frequency compensation scheme to
achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD4701 is internally compensated for unity gain
stability using a novel scheme that does not use a nulling resistor. This
scheme produces a clean single pole roll off in the gain characteristics
while providing for more than 70 degrees of phase margin at the unity
gain frequency.
differential stages connected in parallel to accomplish rail-to-rail input
common mode voltage range. This means that with the ranges of
common mode input voltage close to the power supplies, one of the
two differential stages is switched off internally. To maintain compat-
ibility with other operational amplifiers, this switching point has been
selected to be about 1.5V below the positive supply voltage. Since
offset voltage trimming on the ALD4701 is made when the input
voltage is symmetrical to the supply voltages, this internal switching
does not affect a large variety of applications such as an inverting
amplifier or non-inverting amplifier with a gain larger than 2.5 (5V
operation), where the common mode voltage does not make excur-
sions above this switching point. The user should however, be aware
that this switching does take place if the operational amplifier is
connected as a unity gain buffer and should make provision in his
design to allow for input offset voltage variations.
diode reverse bias leakage currents, and are typically less than 1pA
1600
1200
800
400
0
7
6
5
4
3
2
1
0
COMMON MODE INPUT VOLTAGE RANGE
0
0
AS A FUNCTION OF SUPPLY VOLTAGE
SUPPLY CURRENT AS A FUNCTION
INPUTS GROUNDED
OUTPUT UNLOADED
T
A
1
= 25 C
1
OF SUPPLY VOLTAGE
2
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
2
T
3
A
= -55 C
3
4
TYPICAL PERFORMANCE CHARACTERISTICS
4
-25 C
5
+70 C
+125 C
5
6
+25 C
7
6
Advanced Linear Devices
4. The output stage consists of class AB complementary output drivers,
5. The ALD4701 operational amplifier has been designed to provide full
6. The ALD4701, with its micropower operation, offers numerous ben-
10000
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 10
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors as
determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
static discharge protection. Internally, the design has been carefully
implemented to minimize latch up. However, care must be exercised
when handling the device to avoid strong static fields that may
degrade a diode junction, causing increased input leakage currents.
In using the operational amplifier, the user is advised to power up the
circuit before, or simultaneously with, any input voltages applied and
to limit input voltages not to exceed 0.3V of the power supply voltage
levels.
efits in reduced power supply requirements, less noise coupling and
current spikes, less thermally induced drift, better overall reliability due
to lower self heating, and lower input bias current.
practically no warm up time as the chip junction heats up to only 0.4 C
above ambient temperature under most operating conditions.
1000
1000
100
100
1.0
0.1
10
10
1
10K
-50
INPUT BIAS CURRENT AS A FUNCTION
12
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
-25
V
would not be a problem as the source impedance would
OF AMBIENT TEMPERATURE
S
= 2.5V
AMBIENT TEMPERATURE ( C)
0
100K
LOAD RESISTANCE ( )
25
50
1M
75
V
T
S
A
= 2.5V
= 25 C
100
10M
125
It requires
4