A8514KLPTR-T Allegro Microsystems Inc, A8514KLPTR-T Datasheet - Page 11

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A8514KLPTR-T

Manufacturer Part Number
A8514KLPTR-T
Description
IC LED DVR WHT 4X80MA 16-ETSSOP
Manufacturer
Allegro Microsystems Inc
Datasheets

Specifications of A8514KLPTR-T

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
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Part Number:
A8514KLPTR-T
Manufacturer:
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Quantity:
20 000
A8514
Enabling the IC
The IC turns on when a logic high signal is applied on the
PWM/EN pin with a minimum duration of t
clock cycle, and the input voltage present on the VIN pin is
greater than the 4.35 V necessary to clear the UVLO (V
threshold. The power-up sequence is shown in figure 2. Before
the LEDs are enabled, the A8514 driver goes through a system
check to determine if there are any possible fault conditions that
might prevent the system from functioning correctly. Also, if the
FSET/SYNC pin is pulled low, the IC will not power-up. More
information on the FSET/SYNC pin can be found in the Sync
section of this datasheet.
Powering up: LED pin short-to-ground check
The VIN pin has a UVLO function that prevents the A8514
from powering-up until the UVLO threshold is reached. After
the VIN pin goes above UVLO, and a high signal is present on
the PWM/EN pin, the IC proceeds to power-up. As shown in
figure 3, at this point the A8514 enables the disconnect switch
and checks if any LEDx pins are shorted to ground and/or are not
used.
The LED detect phase starts when the GATE voltage of the
disconnect switch is equal to V
threshold on the LEDx pins exceeds 120 mV, a delay of between
3000 and 4000 clock cycles is used to determine the status of the
pins. Thus, the LED detection duration varies with the switching
frequency, as shown in the following table:
The LED pin detection voltage thresholds are as follows:
LED Pin Voltage
<70 mV
150 mV
325 mV
Switching Frequency
(MHz)
0.800
0.600
2
1
LED Pin Status
Short-to-ground
LED pin in use
Not used
IN
– 4.5 V. After the voltage
LED removed from operation
Detection Time
Power-up is halted
PWMH
3.75 to 5
1.5 to 2
5 to 6.7
3 to 4
(ms)
Action
None
Functional Description
for the first
Wide Input Voltage Range, High Efficiency
UVLOrise
)
Figure 3. Power-up diagram; shows the relationship of an LEDx pin with
respect to the gate voltage of the disconnect switch (if used) during the
LED detect phase, as well as the duration of the LED detect phase for a
switching frequency of 2 MHz; shows GATE (ch1, 5 V/div.), LED (ch2,
500 mV/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins,
time = 500 μs/div.
C1
Figure 2. Power-up diagram; shows VDD (ch1, 2 V/div.), FSET/SYNC (ch2,
1 V/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 2 V/div.) pins,
time = 200 μs/div.
C2
C3
C4
C1
C2
C3
C4
Fault Tolerant LED Driver
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
FSET/SYNC
PWM/EN
t
PWM/EN
t
GATE
LEDx
ISET
ISET
VDD
GATE = V
LED detection period
IN
– 4.5 V
11

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