LCMXO640C-3MN100I Lattice, LCMXO640C-3MN100I Datasheet - Page 39

• Manufacturer Part Number: LCMXO640C-3MN100I
• Description: IC PLD 640LUTS 74I/O 100-BGA
• Manufacturer: Lattice
• Series: MachXOr

Specifications of LCMXO640C-3MN100I

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.9ns
• Voltage Supply - Internal: 1.71 V ~ 3.465 V
• Number Of Logic Elements/blocks: -
• Number Of Macrocells: 320
• Number Of Gates: -
• Number Of I /o: 74
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
MachXO External Switching Characteristics
General I/O Pin Parameters (Using Global Clock without PLL)
t
t
t
t
f
t
1. General timing numbers based on LVCMOS2.5V, 12 mA.
Rev. A 0.19
Parameter
PD
CO
SU
H
MAX_IO
SKEW_PRI
Best Case t
Best Case Clock to Output - From PFU
Clock to Data Setup - To PFU
Clock to Data Hold - To PFU
Clock Frequency of I/O and PFU Register
Global Clock Skew Across Device
PD
Description
Through 1 LUT
Over Recommended Operating Conditions
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
Device
3-13
1
Min.
-0.3
-0.1
-0.4
1
1.3
1.1
1.1
1.1
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-5
DC and Switching Characteristics
Max.
600
600
600
600
200
200
220
220
3.5
3.5
3.6
3.6
4.0
4.0
4.3
4.3
—
—
—
—
—
—
—
—
MachXO Family Data Sheet
Min.
-0.3
-0.1
-0.4
1.6
1.3
1.3
1.3
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-4
Max.
550
550
550
550
220
220
240
240
4.2
4.2
4.4
4.4
4.8
4.8
5.2
5.2
—
—
—
—
—
—
—
—
Min.
-0.3
-0.1
-0.4
1.8
1.5
1.6
1.5
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-3
Max.
500
500
500
500
240
240
260
260
4.9
4.9
5.1
5.1
5.6
5.7
6.1
6.1
—
—
—
—
—
—
—
—
Units
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps