LFXP20E-4F256C Lattice, LFXP20E-4F256C Datasheet - Page 251

• Manufacturer Part Number: LFXP20E-4F256C
• Description: IC FPGA 19.7KLUTS 188I/O 256-BGA
• Manufacturer: Lattice

Specifications of LFXP20E-4F256C

• Lead Free Status / Rohs Status: Contains lead / RoHS non-compliant

LatticeECP/EC and LatticeXP
Lattice Semiconductor
DDR Usage Guide
end
endmodule
Preference File
In order to run the above DDR PFU Implementation at 300MHZ, the following preferences were added to the soft-
ware preference file.
COMMERCIAL;
FREQUENCY NET "ddrclk90" 300.000000 MHz ;
INPUT_SETUP PORT "ddrdata_0" 0.800000 ns CLKNET "ddrclk90" ;
INPUT_SETUP PORT "ddrdata_1" 0.800000 ns CLKNET "ddrclk90" ;
INPUT_SETUP PORT "ddrdata_2" 0.800000 ns CLKNET "ddrclk90" ;
INPUT_SETUP PORT "ddrdata_3" 0.800000 ns CLKNET "ddrclk90" ;
INPUT_SETUP PORT "ddrdata_4" 0.800000 ns CLKNET "ddrclk90" ;
INPUT_SETUP PORT "ddrdata_5" 0.800000 ns CLKNET "ddrclk90" ;
INPUT_SETUP PORT "ddrdata_6" 0.800000 ns CLKNET "ddrclk90" ;
INPUT_SETUP PORT "ddrdata_7" 0.800000 ns CLKNET "ddrclk90" ;
BLOCK ASYNCPATHS ;
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