CY7C344-15PC Cypress Semiconductor Corp, CY7C344-15PC Datasheet - Page 6

• Manufacturer Part Number: CY7C344-15PC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C344-15PC

• Family Name: MAX®
• Memory Type: EPROM
• # Macrocells: 32
• Number Of Usable Gates: 600
• Frequency (max): 83.3MHz
• Propagation Delay Time: 15ns
• Number Of Logic Blocks/elements: 1
• # I/os (max): 16
• Operating Supply Voltage (typ): 5V
• In System Programmable: No
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 28
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-03006 Rev. *B
External Asynchronous Switching Characteristics
t
t
t
t
t
t
t
t
f
f
f
f
t
Notes:
Parameter
19. This specification is a measure of the delay from an asynchronous register clock input to internal feedback of the registered output signal to a combinatorial
20. This parameter is measured with a positive-edge-triggered clock at the register. For negative edge triggering, the t
21. This specification is a measure of the delay associated with the internal register feedback path for an asynchronously clocked register. This delay plus the
22. This parameter indicates the guaranteed maximum frequency at which an asynchronously clocked state machine configuration with external feedback can
23. This specification indicates the guaranteed maximum frequency at which an asynchronously clocked state machine with internal-only feedback can operate. If
24. This specification indicates the guaranteed maximum frequency at which an individual output or buried register can be cycled in asynchronously clocked mode.
25. This specification indicates the guaranteed maximum frequency at which an individual output or buried register can be cycled in asynchronously clocked mode
26. This parameter indicates the minimum time that the previous register output data is maintained on the output pin after an asynchronous register clock input to
ACO1
ACO2
AS
AH
AWH
AWL
ACF
AP
MAXA1
MAXA2
MAXA3
MAXA4
AOH
output for which the registered output signal is used as an input. Assumes no expanders are used in logic of combinatorial output or the asynchronous clock
input. This parameter is tested periodically by sampling production material.
given input is used to clock multiple registers with both positive and negative polarity, t
asynchronous register set-up time, t
the asynchronous clock path. This parameter is tested periodically by sampling production material.
operate. It is assumed that no expander logic is employed in the clock signal path or data path.
register output states must also control external points, this frequency can still be observed as long as this frequency is less than 1/t
no expander logic is utilized. This parameter is tested periodically by sampling production material.
This frequency is least of 1/(t
data-path mode. Assumes no expander logic is used.
by a clock signal applied to an external dedicated input or an I/O pin.
an external dedicated input or I/O pin.
Asynchronous Clock Input to Output Delay
Asynchronous Clock Input to Local Feedback to
Combinatorial Output
Dedicated Input or Feedback Set-Up Time to
Asynchronous Clock Input
Input Hold Time from Asynchronous Clock Input
Asynchronous Clock Input HIGH Time
Asynchronous Clock Input LOW Time
Asynchronous Clock to Local Feedback Input
External Asynchronous Clock Period (1/f
External Maximum Frequency in Asynchronous
Mode 1/(t
Maximum Internal Asynchronous Frequency
1/(t
Data Path Maximum Frequency in Asynchronous
Mode
Maximum Asynchronous Register Toggle
Frequency 1/(t
Output Data Stable Time from Asynchronous Clock
Input
ACF
[4, 26]
[4, 24]
+ t
ACO1
AS
) or 1/(t
AWH
AWH
+ t
+ t
AS
AWL
AS
AWH
+ t
, is the minimum internal period for an asynchronously clocked state machine configuration. This delay assumes no expander logic in
)
), 1/(t
[4, 22]
AWL
[19]
+ t
AS
)
Description
AWL
[4, 25]
+ t
AH
USE ULTRA37000
)
[4, 23]
), or 1/t
ALL NEW DESIGNS
ACO1
[4]
[4, 20]
. It also indicates the maximum frequency at which the device may operate in the asynchronously clocked
MAX4
)
[4, 21]
[4]
AWH
Over Operating Range
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
should be used for both t
TM
FOR
Min. Max. Min. Max. Min. Max.
45.4
45.4
66.6
66.6
76.9
76.9
7C344-15
13
13
40
40
15
15
7
7
7
7
6
6
7
7
AWH
15
15
30
30
18
18
[7]
and t
AWL
AWH
34.4
34.4
62.5
62.5
16
16
37
37
50
50
15
15
.
7C344-20
9
9
9
9
7
7
9
9
and t
AWL
20
20
30
30
18
18
parameters must be swapped. If a
ACO1
. This specification assumes
30.3
30.3
7C344-25
12
12
12
12
20
20
27
27
40
40
50
50
15
15
11
11
9
9
CY7C344
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25
25
37
37
21
21
MHz
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns