LH28F800SGN-L10 Sharp Electronics, LH28F800SGN-L10 Datasheet - Page 16

• Manufacturer Part Number: LH28F800SGN-L10
• Manufacturer: Sharp Electronics

Specifications of LH28F800SGN-L10

• Cell Type: NOR
• Density: 8Mb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19b
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: SOP
• Program/erase Volt (typ): 2.7/3.3/5/12V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7/4.5V
• Operating Supply Voltage (max): 3.6/5.5V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Not Compliant

Set Permanent
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
SR.6 = ERASE SUSPEND STATUS (ESS)
SR.5 = ERASE AND CLEAR LOCK-BITS STATUS (ECLBS)
SR.4 = WORD WRITE AND SET LOCK-BIT STATUS (WWSLBS)
SR.3 = V
SR.2 = WORD WRITE SUSPEND STATUS (WWSS)
SR.1 = DEVICE PROTECT STATUS (DPS)
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
OPERATION
Block Erase
Clear Block
Word Write
Set Block
Lock-Bits
WSMS
Lock-Bit
Lock-Bit
1 = Ready
0 = Busy
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
1 = Error in Block Erase or Clear Lock-Bits
0 = Successful Block Erase or Clear Lock-Bits
1 = Error in Word Write or Set Permanent/Block Lock-Bit
0 = Successful Word Write or Set Permanent/Block Lock-Bit
1 = V
0 = V
1 = Word Write Suspended
0 = Word Write in Progress/Completed
1 = Permanent Lock-Bit, Block Lock-Bit and/or RP#
0 = Unlock
7
or
Lock Detected, Operation Abort
PP
PP
PP
STATUS (VPPS)
Low Detect, Operation Abort
OK
PERMANENT BLOCK
LOCK-BIT LOCK-BIT
ESS
X
X
0
1
0
1
0
1
6
0
1
X
X
X
ECLBS
5
Table 5 Write Protection Alternatives
V
Table 6 Status Register Definition
IH
RP#
V
V
V
V
V
V
V
V
or V
X
X
X
HH
HH
HH
HH
IH
IH
IH
IH
WWSLBS
HH
4
Block Erase and Word Write Enabled
Block Lock-Bit Override. Block Erase and Word Write Enabled
Block is Locked. Block Erase and Word Write Disabled
Permanent Lock-Bit is set. Block Erase and Word Write Disabled
Set Block Lock-Bit Enabled
Set Block Lock-Bit Disabled
Permanent Lock-Bit is set. Set Block Lock-Bit Disabled
Set Permanent Lock-Bit Enabled
Set Permanent Lock-Bit Disabled
Clear Block Lock-Bits Enabled
Clear Block Lock-Bits Disabled
Permanent Lock-Bit is set. Clear Block Lock-Bits Disabled
- 16 -
NOTES :
Check RY/BY# or SR.7 to determine block erase, word
write, or lock-bit configuration completion.
SR.6-0 are invalid while SR.7 =
If both SR.5 and SR.4 are
configuration attempt, an improper command sequence was
entered.
SR.3 does not provide a continuous indication of V
The WSM interrogates and indicates the V
Block Erase, Word Write, Set Block/
Clear Block Lock-Bits command sequences. SR.3 is not
guaranteed to reports accurate feedback only when V
V
SR.1 does not provide a continuous indication of permanent
and block lock-bit values. The WSM interrogates the
permanent lock-bit, block lock-bit, and RP# only after Block
Erase, Word Write, or Lock-Bit configuration command
sequences. It informs the system, depending on the attempted
operation, if the block lock-bit is set, permanent lock-bit is set,
and/or RP# is not V
lock configuration codes after writing the Read Identifier Codes
command indicates permanent and block lock-bit status.
SR.0 is reserved for future use and should be masked out
when polling the status register.
PPH1/2/3
VPPS
3
.
WWSS
HH
EFFECT
2
. Reading the block lock and permanent
LH28F800SG-L (FOR SOP)
"
1
"
s after a block erase or lock-bit
"
0
"
.
DPS
Permanent
1
PP
level only after
Lock-Bit, or
PP
R
0
level.
PP