LH28F160S5HT-L10 Sharp Electronics, LH28F160S5HT-L10 Datasheet - Page 44

• Manufacturer Part Number: LH28F160S5HT-L10
• Manufacturer: Sharp Electronics

Specifications of LH28F160S5HT-L10

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 100ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

sharp
6.2.6 ALTERNATIVE CE#-CONTROLLED WRITES
NOTES:
1. In systems where CE# defines the write pulse width (within a longer WE# timing waveform), all setup, hold and
2. Sampled, not 100% tested.
3. Refer to Table 4 for valid A
4. V
5. See Ordering Information for device speeds (valid operational combinations).
6. BYTE# should be in stable until determination of block erase, full chip erase, (multi) word/byte write, block lock-
7. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (High Seed
8. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (Standard
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
SHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVSL
FVEH
EHFV
Sym.
inactive WE# times should be measured relative to the CE# waveform.
configuration.
lock-bit configuration success (SR.1/3/4/5=0).
bit configuration or STS configuration success (SR.7=1).
Configuration) for testing characteristics.
Configuration) for testing characteristics.
PP
should be held at V
Write Cycle Time
RP# High Recovery to CE# Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
WP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to STS Going Low
Write Recovery before Read
V
WP# V
High Z
BYTE# Setup to CE# Going High
BYTE# Hold from CE# High
PP
PP
Setup to CE# Going High
Hold from Valid SRD, STS High Z
Versions
IH
IH
Setup to CE# Going High
Hold from Valid SRD, STS
Parameter
(5)
PPH1
IN
until determination of block erase, full chip erase, (multi) word/byte write or block
and D
V
CC
IN
=5V±0.5V, 5V±0.25V, T
for block erase, full chip erase, (multi) word/byte write or block lock-bit
V
V
CC
CC
=5V±0.25V LH28F160S5-L70
=5V±0.5V
LHF16KA9
Notes
2,4
2,4
2
2
2
3
3
NOTE 6
(1)
Min.
A
100
100
70
50
40
40
25
50
=0°C to +70°C
1
0
5
5
0
0
0
0
Max.
90
(7)
LH28F160S5-L80
NOTE 6
Min.
100
100
80
50
40
40
25
50
1
0
5
5
0
0
0
0
Max.
90
(8)
Rev. 2.0
Unit
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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