LH28F320BJHE-PTTL90 Sharp Electronics, LH28F320BJHE-PTTL90 Datasheet - Page 3

• Manufacturer Part Number: LH28F320BJHE-PTTL90
• Manufacturer: Sharp Electronics

Specifications of LH28F320BJHE-PTTL90

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 22/21Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 4M/2M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

1 INTRODUCTION.............................................................. 3
2 PRINCIPLES OF OPERATION........................................ 8
3 BUS OPERATION ............................................................ 9
4 COMMAND DEFINITIONS........................................... 11
sharp
1.1 Features ........................................................................ 3
1.2 Product Overview......................................................... 3
1.3 Product Description...................................................... 4
2.1 Data Protection............................................................. 8
3.1 Read.............................................................................. 9
3.2 Output Disable.............................................................. 9
3.3 Standby......................................................................... 9
3.4 Reset............................................................................. 9
3.5 Read Identifier Codes................................................. 10
3.6 OTP(One Time Program) Block ................................ 10
3.7 Write........................................................................... 11
4.1 Read Array Command................................................ 13
4.2 Read Identifier Codes Command ............................... 13
4.3 Read Status Register Command ................................. 13
4.4 Clear Status Register Command................................. 13
4.5 Block Erase Command............................................... 14
4.6 Full Chip Erase Command ......................................... 14
4.7 Word/Byte Write Command....................................... 14
4.8 Block Erase Suspend Command ................................ 15
4.9 Word/Byte Write Suspend Command ........................ 15
4.10 Set Block and Permanent Lock-Bit Command......... 16
4.11 Clear Block Lock-Bits Command ............................ 16
4.12 OTP Program Command .......................................... 17
4.13 Block Locking by the WP# ...................................... 17
1.3.1 Package Pinout ....................................................... 4
1.3.2 Block Organization................................................. 4
CONTENTS
PAGE
LHF32J04
5 DESIGN CONSIDERATIONS ....................................... 27
6 ELECTRICAL SPECIFICATIONS ................................ 29
5.1 Three-Line Output Control ........................................ 27
5.2 RY/BY# and WSM Polling ....................................... 27
5.3 Power Supply Decoupling ......................................... 27
5.4 V
5.5 V
5.6 Power-Up/Down Protection....................................... 28
5.7 Power Dissipation ...................................................... 28
5.8 Data Protection Method ............................................. 28
6.1 Absolute Maximum Ratings ...................................... 29
6.2 Operating Conditions ................................................. 29
6.2.1 Capacitance .......................................................... 29
6.2.2 AC Input/Output Test Conditions ........................ 30
6.2.3 DC Characteristics ............................................... 31
6.2.4 AC Characteristics - Read-Only Operations ........ 33
6.2.5 AC Characteristics - Write Operations ................ 36
6.2.6 Alternative CE#-Controlled Writes...................... 38
6.2.7 Reset Operations .................................................. 40
6.2.8 Block Erase, Full Chip Erase, Word/Byte Write and
CCW
CC
Lock-Bit Configuration Performance ................. 41
, V
Trace on Printed Circuit Boards ..................... 27
CCW
, RP# Transitions .................................... 27
Rev. 1.27
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