CY62128DV30L-70SI Cypress Semiconductor Corp, CY62128DV30L-70SI Datasheet - Page 4

• Manufacturer Part Number: CY62128DV30L-70SI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62128DV30L-70SI

• Density: 1Mb
• Access Time (max): 70ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 2.5/3.3V
• Address Bus: 17b
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 10mA
• Operating Supply Voltage (min): 2.2V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 128K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05231 Rev. *H
AC Test Loads and Waveforms
Data Retention Characteristics
Data Retention Waveform
Note:
V
I
t
t
Parameter
8. Full device operation requires linear V
CCDR
CDR
R
DR
[8]
V
CE
CE
or
CC
[4]
1
2
V
Data Retention Current
Chip Deselect to Data Retention Time
Operation Recovery Time
Parameters
OUTPUT
CC
INCLUDING
R
V
for Data Retention
R1
R2
V
TH
TH
CC
JIG AND
SCOPE
50 pF
Description
R1
CC
ramp from V
V
CC(min.)
t
CDR
[8]
R2
2.5V (2.2V - 2.7V)
DR
to V
16600
15400
CC(min.)
8000
1.20
V
V
Rise Time = 1 V/ns
CC
IN
DATA RETENTION MODE
> V
= 1.5V, CE
> 100 µs.
V
CC
CC
GND
− 0.2V or V
V
DR
Equivalent to:
OUTPUT
1
> 1.5V
> V
Conditions
10%
CC
IN
3.0V (2.7V - 3.6V)
− 0.2V, CE
< 0.2V
ALL INPUT PULSES
90%
1103
1554
1.75
645
THEVENIN
2
< 0.2V,
R
TH
V
CC(min.)
EQUIVALENT
t
R
L
LL
90%
V
10%
Min.
100
Fall Time = 1 V/ns
1.5
CY62128DV30
0
Typ.
Unit
Ω
Ω
Ω
V
[4]
Page 4 of 11
Max. Unit
4
3
µA
ns
µs
V
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