CY7C1019CV33-10VC Cypress Semiconductor Corp, CY7C1019CV33-10VC Datasheet - Page 4

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CY7C1019CV33-10VC

Manufacturer Part Number
CY7C1019CV33-10VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1019CV33-10VC

Density
1Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
80mA
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Switching Characteristics
Document #: 38-05130 Rev. *H
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
Notes
Parameter
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4. AC characteristics (except High-Z) for all speeds are tested using the Thevenin load shown in section (a) in
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V.
6. t
7. At any given temperature and voltage condition, t
8. This parameter is guaranteed by design and is not tested.
9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of
10. The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t
OUTPUT
[8]
[8]
speeds using the test load shown in section (c) in
any of these signals can terminate the write. The input data setup and hold timing should be referenced to the leading edge of the signal that terminates the write.
HZOE
3.3V
, t
HZCE
30 pF
[9, 10]
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power Up
CE HIGH to Power Down
Write Cycle Time
CE LOW to Write End
Address Setup to Write End
Address Hold from Write End
Address Setup to Write Start
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
(a)
HZWE
R 317
are specified with a load capacitance of 5 pF as in part (d) of
Description
351
R2
[7]
[6, 7]
[7]
[6, 7]
[6, 7]
GND
Over the Operating Range
3.0V
Rise Time: 1 V/ns
HZCE
Figure 3. AC Test Loads and Waveforms
Figure
is less than t
3.
10%
LZCE
90%
-10 (Industrial/
Min
10
10
3
0
3
0
8
8
0
0
7
5
0
3
, t
ALL INPUT PULSES
HZOE
Auto-A)
[5]
is less than t
(b)
Max
10
10
10
5
5
5
5
Figure
LZOE
HZWE
3. Transition is measured 500 mV from steady-state voltage.
Fall Time: 1 V/ns
-12 (Industrial)
, and t
Min
90%
12
12
and t
3
0
3
0
9
9
0
0
8
6
0
3
10%
HZWE
SD
[4]
.
Figure
is less than t
Max
High-Z characteristics:
12
12
12
6
6
6
6
3. High-Z characteristics are tested for all
OUTPUT
3.3V
LZWE
-15 (Industrial)
Min
15
15
10
10
10
3
0
3
0
0
0
8
0
3
for any given device.
CY7C1019CV33
5 pF
Max
15
15
15
7
7
7
7
(c)
R 317
Page 4 of 10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
351
R2
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