APA075-TQ100I MICROSEMI, APA075-TQ100I Datasheet - Page 81

• Manufacturer Part Number: APA075-TQ100I
• Manufacturer: MICROSEMI

Specifications of APA075-TQ100I

• Family Name: ProASICPLUS®
• Number Of Usable Gates: 75000
• # Registers: 3072
• # I/os (max): 66
• Frequency (max): 180MHz
• Process Technology: 0.22um (CMOS)
• Operating Supply Voltage (typ): 2.5V
• Ram Bits: 27648
• Device System Gates: 75000
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 2.7V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Synchronous FIFO Write
Note: The plot shows the normal operation status.
Figure 2-44 • Synchronous FIFO Write
Table 2-67 • T
Symbol t
CCYC
CMH
CML
DCH
DCS
FCBA
ECBA
ECBH,
FCBH,
HCBH
HCBA
WPCA
WPCH
WRCH, WBCH WRB & WBLKB hold from WCLKS ↑
WRCS, WBCS
Note: * At fast cycles, ECBA and FCBA = MAX (7.5 ns – CMH), 3.0 ns.
xxx
T
J
J
= 0°C to 110°C; V
= –55°C to 150°C, V
Clock high phase
Clock low phase
DI hold from WCLKS ↑
DI setup to WCLKS ↑
Old EMPTY, FULL, EQTH, & GETH valid hold
time from WCLKS ↓
Old WPE valid from WCLKS ↑
WRB & WBLKB setup to WCLKS ↑
Cycle time
New FULL access from WCLKS ↓
EMPTY↓ access from WCLKS ↓
EQTH or GETH access from WCLKS ↓
New WPE access from WCLKS ↑
Description
t WRCH , t WBCH
EQTH, GETH
t WRCS , t WBCS
WRB, WBLKB
DD
WCLKS
DD
EMPTY
= 2.3 V to 2.7 V for Commercial/Industrial
FULL
WPE
= 2.3 V to 2.7 V for Military/MIL-STD-883
t DCS
DI
t WPCH
t DCH
Cycle Start
t WPCA
t CMH
Min.
3.0*
3.0*
7.5
3.0
3.0
0.5
1.0
4.5
3.0
0.5
1.0
v5.9
t CCYC
Max.
t HCBA
1.0
0.5
t CML
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t HCBH
t ECBH , t FCBH
t ECBA , t FCBA
(Full Inhibits Write)
Empty/full/thresh are invalid from the end of
hold until the new access is complete
WPE is invalid, while PARGEN is active
ProASIC
PLUS
Notes
Flash Family FPGAs
2-71