AM28F512-150JC AMD (ADVANCED MICRO DEVICES), AM28F512-150JC Datasheet - Page 6

• Manufacturer Part Number: AM28F512-150JC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM28F512-150JC

• Lead Free Status / Rohs Status: Not Compliant

PIN DESCRIPTION
A0–A15
Address Inputs for memory locations. Internal latches
hold addresses during write cycles.
CE
Chip Enable active low input activates the chip’s control
logic and input buffers. Chip Enable high will deselect
the device and operates the chip in stand-by mode.
DQ0–DQ7
Data Inputs during memory write cycles. Internal
latches hold data during write cycles. Data Outputs
during memory read cycles.
NC
No Connect-corresponding pin is not connected inter-
nally to the die.
OE
Output Enable active low input gates the outputs of the
device through the data buffers during memory read
cycles. Output Enable is high during command se-
quencing and program/erase operations.
6
#
#
(E
(G
#
#
)
)
Am28F512
V
Power supply for device operation. (5.0 V
V
Program voltage input. V
order to write to the command register. The command
register controls all functions required to alter the mem-
ory array contents. Memory contents cannot be altered
when V
V
Ground
WE
Write Enable active low input controls the write function
of the command register to the memory array. The tar-
get address is latched on the falling edge of the Write
Enable pulse and the appropriate data is latched on the
rising edge of the pulse. Write Enable high inhibits writ-
ing to the device.
CC
PP
SS
#
(W
PP
#
)
V
CC
+2 V.
PP
must be at high voltage in
5% or 10%)