GAL20V8C-10LJ Lattice, GAL20V8C-10LJ Datasheet

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GAL20V8C-10LJ

Manufacturer Part Number
GAL20V8C-10LJ
Description
SPLD - Simple Programmable Logic Devices 5V 20 I/O
Manufacturer
Lattice
Datasheet

Specifications of GAL20V8C-10LJ

Logic Family
GAL
Number Of Macrocells
8
Maximum Operating Frequency
83.3 MHz
Number Of Programmable I/os
8
Delay Time
10 ns
Operating Supply Voltage
5 V
Supply Current
115 mA
Maximum Operating Temperature
+ 75 C
Minimum Operating Temperature
0 C
Package / Case
PLCC-28
Mounting Style
SMD/SMT
Number Of Product Terms Per Macro
8
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Lead Free Status / Rohs Status
No

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GAL
September 2010
Product Change Notifications (PCNs) have been issued to discontinue all devices in this
data sheet.
The original datasheet pages have not been modified and do not reflect those changes.
Please refer to the table below for reference PCN and current product status.
Product Line
GAL20V8B
®
20V8 Device Datasheet
5555 N.E. Moore Ct.
All Devices Discontinued!
GAL20V8B-7LP
GAL20V8B-7LP
GAL20V8B-10LP
GAL20V8B-10LPN
GAL20V8B-15LP
GAL20V8B-15LPN
GAL20V8B-25LP
GAL20V8B-25LPN
GAL20V8B-10LPI
GAL20V8B-10LPNI
GAL20V8B-15LPI
GAL20V8B-15LPNI
GAL20V8B-25LPI
GAL20V8B-25LPNI
GAL20V8B-15QP
GAL20V8B-15QPN
GAL20V8B-25QP
GAL20V8B-25QPN
GAL20V8B-20QPI
GAL20V8B-20QPNI
GAL20V8B-25QPI
GAL20V8B-25QPNI
GAL20V8B-15LJ
GAL20V8B-15LJN
GAL20V8B-25LJ
GAL20V8B-25LJN
GAL20V8B-15LJI
GAL20V8B-15LJNI
GAL20V8B-25LJI
GAL20V8B-25LJNI
GAL20V8B-15QJ
GAL20V8B-15QJN
Ordering Part Number
Hillsboro, Oregon 97124-6421
Internet: http://www.latticesemi.com
Phone (503) 268-8000
Product Status
Discontinued
FAX (503) 268-8347
Reference PCN
PCN#06-07
PCN#09-10
PCN#13-10
PCN#06-07
PCN#09-10
PCN#13-10
PCN#09-10
PCN#13-10
PCN#06-07
PCN#13-10

Related parts for GAL20V8C-10LJ

GAL20V8C-10LJ Summary of contents

Page 1

... GAL20V8B-25LJ GAL20V8B-25LJN GAL20V8B-15LJI GAL20V8B-15LJNI GAL20V8B-25LJI GAL20V8B-25LJNI GAL20V8B-15QJ GAL20V8B-15QJN 5555 N.E. Moore Ct.  Hillsboro, Oregon 97124-6421 Product Status Discontinued  Phone (503) 268-8000 Internet: http://www.latticesemi.com Reference PCN PCN#06-07 PCN#09-10 PCN#13-10 PCN#06-07 PCN#09-10 PCN#13-10 PCN#09-10 PCN#13-10 PCN#06-07 PCN#13-10  FAX (503) 268-8347 ...

Page 2

... GAL20V8B-25QJN GAL20V8B GAL20V8B-20QJI (Cont’d) GAL20V8B-20QJNI GAL20V8B-25QJI GAL20V8B-25QJNI GAL20V8C-5LJ GAL20V8C-5LJN GAL20V8C-7LJ GAL20V8C-7LJN GAL20V8C GAL20V8C-10LJ GAL20V8C-10LJN GAL20V8C-10LJI GAL20V8C-10LJNI 5555 N.E. Moore Ct.  Hillsboro, Oregon 97124-6421 Product Status Discontinued  Phone (503) 268-8000 Internet: http://www.latticesemi.com Reference PCN PCN#13-10 PCN#09-10 PCN#13-10 PCN#06-07 PCN#13-10  ...

Page 3

... High Speed Graphics Processing — Standard Logic Speed Upgrade • ELECTRONIC SIGNATURE FOR IDENTIFICATION • LEAD-FREE PACKAGE OPTIONS Description The GAL20V8C, at 5ns maximum propagation delay time, com- bines a high performance CMOS process with Electrically Eras- able ( floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (< ...

Page 4

GAL20V8 Ordering Information Conventional Packaging Commercial Grade Specifications ...

Page 5

... Lead-Free Packaging Commercial Grade Specifications Industrial Grade Specifications Discontinued per PCN #06-07. Contact Rochester Electronics for available inventory. Part Number Description GAL20V8C Device Name GAL20V8B Speed (ns Low Power Power Q = Quarter Power XXXXXXXX Specifications GAL20V8 Grade Blank = Commercial I = Industrial Package P = Plastic DIP ...

Page 6

Output Logic Macrocell (OLMC) The following discussion pertains to configuring the output logic macrocell. It should be noted that actual implementation is accom- plished by development software/hardware and is completely trans- parent to the user. There are three global OLMC ...

Page 7

Registered Mode In the Registered mode, macrocells are configured as dedicated registered outputs or as I/O functions. Architecture configurations available in this mode are similar to the common 20R8 and 20RP4 devices with various permutations of polarity, I/O and register ...

Page 8

Registered Mode Logic Diagram 1(2) 0 2(3) 0000 0280 3(4) 0320 0600 4(5) 0640 0920 5(6) 0960 1240 6(7) 1280 1560 7(9) 1600 1880 8(10) 1920 2200 9(11) 2240 2520 10(12) 11(13) DIP (PLCC) Package Pinouts 2640 ...

Page 9

Complex Mode In the Complex mode, macrocells are configured as output only or I/O functions. Architecture configurations available in this mode are similar to the common 20L8 and 20P8 devices with programmable polarity in each macrocell six I/Os ...

Page 10

Complex Mode Logic Diagram 1(2) 2(3) 0000 0280 3(4) 0320 0600 4(5) 0640 0920 5(6) 0960 1240 6(7) 1280 1560 7(9) 1600 1880 8(10) 1920 2200 9(11) 2240 2520 10(12) 11(13) DIP (PLCC) Package Pinouts ...

Page 11

Simple Mode In the Simple mode, pins are configured as dedicated inputs or as dedicated, always active, combinatorial outputs. Architecture configurations available in this mode are similar to the common 14L8 and 16P6 devices with many permutations of ge- neric ...

Page 12

Simple Mode Logic Diagram 1( 2(3) 0000 0280 3(4) 0320 0600 4(5) 0640 0920 5(6) 0960 1240 6(7) 1280 1560 7(9) 1600 1880 8(10) 1920 2200 9(11) 2240 2520 10(12) 11(13) DIP (PLCC) Package Pinouts 2640 8 12 ...

Page 13

... MAX. Vin = MAX. Vin = 0. OUT = 0. 3. 15MHz Outputs Open = 0. 3. 15MHz Outputs Open = 25 ° Specifications GAL20V8C Specifications GAL20V8 ) ............................... 0 to 75° ........................... –40 to 85° MIN. TYP. 3 — Vss – 0.5 2.0 — — — — — — — 2.4 — IH — ...

Page 14

... Refer to fmax Descriptions section. Characterized initially and after any design or process changes that may affect these parameters. ° Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested Specifications GAL20V8C Over Recommended Operating Conditions 8 outputs switching 1 output switching MAXIMUM* UNITS Specifications GAL20V8 COM/IND COM COM -5 -7 -10 MIN ...

Page 15

Absolute Maximum Ratings Supply voltage V ...................................... –0.5 to +7V CC Input voltage applied .......................... –2 Off-state output voltage applied ......... –2 Storage Temperature ................................ –65 to 150°C Ambient Temperature with Power Applied ........................................ –55 to ...

Page 16

AC Switching Characteristics TEST DESCRIPTION PARAM. COND Input or I/O to Comb. Output Clock to Output Delay — Clock to Feedback Delay t su — Setup Time, Input or ...

Page 17

Switching Waveforms INPUT or I/O FEEDBACK COMBINATIONAL OUTPUT Combinatorial Output INPUT or I/O FEEDBACK t dis COMBINATIONAL OUTPUT Input or I/O to Output Enable/Disable t wh CLK f 1/ max (w/o fb) Clock Width INPUT or I/O FEEDBACK CLK VALID ...

Page 18

... For example, the timing from clock to a combinatorial output is equal to tcf + tpd. GND to 3.0V 2 – 3ns 10% – 90% 1.5ns 10% – 90% FROM OUTPUT (O/Q) 1.5V UNDER TEST 1.5V See Figure GAL20V8C Output Load Conditions (see figure Test Condition 2 L 390Ω 50pF A 390Ω ...

Page 19

... The GAL20V8 input and I/O pins have built-in active pull-ups result, unused inputs and I/O's will float to a TTL "high" (logical "1"). Lattice Semiconductor recommends that all unused inputs and tri-stated I/O pins be connected to another active input Ground. Doing this will tend to improve noise immunity and re- duce I for the device ...

Page 20

Power-Up Reset INTERNAL REGISTER Q - OUTPUT FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL20V8 provides a reset signal to all registers during power-up. All internal registers will have their Q outputs set t low after a specified time ( pr, ...

Page 21

... GAL20V8C: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tpd Outputs 0 -0 ...

Page 22

... GAL20V8C: Typical AC and DC Characteristic Diagrams Vol vs Iol 2 1.5 1 0.5 0 0.00 20.00 40.00 60.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 ...

Page 23

GAL20V8B-7/-10: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 ...

Page 24

GAL20V8B-7/-10: Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.75 0.5 0.25 0 0.00 20.00 40.00 60.00 80.00 100.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) ...

Page 25

GAL20V8B-15/-25: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 ...

Page 26

GAL20V8B-15/-25: Typical AC and DC Characteristic Diagrams Vol vs Iol 2 1.5 1 0.5 0 0.00 20.00 40.00 60.00 80.00 100.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) ...

Page 27

... Revision History Date Version - 20v8_06 August 2006 20v8_07 Specifications GAL20V8 Change Summary Previous Lattice release. Updated for lead-free package options. 25 ...

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