74LV4053PW NXP Semiconductors, 74LV4053PW Datasheet - Page 24

Multiplexer Switch ICs TRIPLE 2-CHANNEL MUX/DMUX

74LV4053PW

Manufacturer Part Number
74LV4053PW
Description
Multiplexer Switch ICs TRIPLE 2-CHANNEL MUX/DMUX
Manufacturer
NXP Semiconductors
Type
Analog Multiplexerr
Datasheet

Specifications of 74LV4053PW

Number Of Channels
3 Channel
On Resistance (max)
180 Ohms
Propagation Delay Time
25 ns, 9 ns, 6 ns, 5 ns, 4 ns, 3 ns
On Time (max)
125 ns
Off Time (max)
95 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
1 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Package / Case
TSSOP-16
Mounting Style
SMD/SMT
Number Of Lines (input / Output)
6 / 3
Package
16TSSOP
Maximum On Resistance
435@2V Ohm
Maximum Propagation Delay Bus To Bus
25(Typ)@1.2V|9(Typ)@2V|6(Typ)@2.7V|5(Typ)@3.3V|4(Typ)@4.5V|3(Typ)@6V ns
Maximum Low Level Output Current
25 mA
Multiplexer Architecture
2:1
Maximum Turn-off Time
95(Typ)@1.2V ns
Maximum Turn-on Time
125(Typ)@1.2V ns
Power Supply Type
Single
Lead Free Status / Rohs Status
 Details
Other names
74LV4053PW,112

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NXP Semiconductors
12. Abbreviations
Table 12.
13. Revision history
Table 13.
74LV4053_4
Product data sheet
Acronym
CMOS
ESD
HBM
MM
TTL
Document ID
74LV4053_4
Modifications:
74LV4053_3
74LV4053_2
Abbreviations
Revision history
Description
Complementary Metal-Oxide Semiconductor
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
Release date
20090810
19980623
19970715
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Added type number 74LV4053BQ (DHVQFN16 package)
R
Package version SOT38-1 changed to SOT38-4 in
ON
values changed in
Data sheet status
Product data sheet
Product specification
Product specification
Rev. 04 — 10 August 2009
Section
2.
Triple single-pole double-throw analog switch
Change notice
-
-
-
Section
3, and
Supersedes
74LV4053_3
74LV4053_2
-
Figure
74LV4053
© NXP B.V. 2009. All rights reserved.
23.
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