GAL16V8D-15LJ Lattice, GAL16V8D-15LJ Datasheet - Page 17

• Manufacturer Part Number: GAL16V8D-15LJ
• Description: SPLD - Simple Programmable Logic Devices 5V 16 I/O
• Manufacturer: Lattice

Specifications of GAL16V8D-15LJ

• Logic Family: GAL
• Number Of Macrocells: 8
• Maximum Operating Frequency: 62.5 MHz
• Number Of Programmable I/os: 8
• Delay Time: 15 ns
• Operating Supply Voltage: 5 V
• Supply Current: 90 mA
• Maximum Operating Temperature: + 75 C
• Minimum Operating Temperature: 0 C
• Package / Case: PLCC-20
• Mounting Style: SMD/SMT
• Number Of Product Terms Per Macro: 8
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Lead Free Status / Rohs Status: No

Note: fmax with external feedback is calculated from measured
tsu and tco.
Note: fmax with no feedback may be less than 1/(twh + twl). This
is to allow for a clock duty cycle of other than 50%.
GAL16V8D (except -3) Output Load Conditions (see figure
above)
3-state levels are measured 0.5V from
steady-state active level.
f
Switching Test Conditions
Input Pulse Levels
Input Rise
and Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
max Descriptions
Test Condition
A
B
C
Active High
Active Low
Active High
Active Low
f
max with External Feedback 1/(
LOGIC
ARRAY
t
su +
f
LOGIC
ARRAY
GAL16V8D-10
(and slower)
GAL16V8D-3/-5/-7
max with No Feedback
t
h
t
su
200Ω
200Ω
200Ω
R
∞
∞
1
REGISTER
REGISTER
CLK
CLK
390Ω
390Ω
390Ω
390Ω
390Ω
R
2 – 3ns 10% – 90%
2
t
t
See figure at right
1.5ns 10% – 90%
co
su+
GND to 3.0V
t
co)
1.5V
1.5V
Table 2-0003/16V8
50pF
50pF
50pF
5pF
5pF
C
L
15
Note: tcf is a calculated value, derived by subtracting tsu from
the period of fmax w/internal feedback (tcf = 1/fmax - tsu). The
value of tcf is used primarily when calculating the delay from
clocking a register to a combinatorial output (through registered
feedback), as shown above. For example, the timing from clock
to a combinatorial output is equal to tcf + tpd.
FROM OUTPUT (O/Q)
UNDER TEST
*C
f
L
max with Internal Feedback 1/(
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
Specifications GAL16V8
LOGIC
ARRAY
R
2
+5V
t
cf
t
pd
REGISTER
R
CLK
1
C *
t
L
su+
TEST POINT
t
cf)