LE77D112BTC Zarlink, LE77D112BTC Datasheet

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LE77D112BTC

Manufacturer Part Number
LE77D112BTC
Description
SLIC 1-CH 63dB 3.3V 44-Pin eTQFP Tray
Manufacturer
Zarlink
Datasheet

Specifications of LE77D112BTC

Package
44eTQFP
Number Of Channels Per Chip
1
Polarity Reversal
Yes
Longitudinal Balanced
63 dB
Minimum Operating Supply Voltage
3.135 V
Typical Operating Supply Voltage
3.3 V

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APPLICATIONS
FEATURES
RELATED LITERATURE
Short/Medium Loop: approximately 2000 ft. of 26 AWG,
and 5 REN loads
Voice over IP/DSL – Integrated Access Devices, Smart
Residential Gateways, Home Gateway/Router
Cable Telephony – NIU, Set-Top Box, Home Side Box,
Cable Modem, Cable PC
Fiber–Fiber In The Loop (FITL), Fiber to the Home
(FTTH)
Wireless Local Loop, Intelligent PBX, ISDN NT1/TA
Integrated Dual-Channel Chip set
— Built-in boost switching power supply tracks line voltage
— Only +3.3 V and +12 V (nominal) required
— Wide range of input voltages (+8 V to +40 V) supported
— Minimum external discrete components
— 44-pin eTQFP package
Ringing
— 5REN
— Up to 90 Vpk, Balanced
— Sinusoidal or trapezoidal with programmable DC offset
Subscriber Loop Test/Self-Test
— GR-909 compliant drop test capability in both
World Wide Programmability:
— Two-wire AC impedance
— Dual Current Limit
— Metering
— Programmable loop closure and ring trip thresholds
Six SLIC Device States, including:
— Low power Standby state
— On-hook transmission
— Reverse Polarity
080697 Le78D11 Data Sheet
080716 Le77D11/Le78D11 Chip Set User’s Guide
081013 Layout Considerations for the Le77D11 and
Le9502 Application Note
minimizing power dissipation
measurements and pass/fail
– Hazardous Potential
– Foreign Electromotive Force
– Resistive Faults
– Receive Off-hook
– Ringers Test
– Loop Length
Voice Over Subscriber Line Interface Circuit
ORDERING INFORMATION
An Le78D11 VoSLAC™ device must be used with this part.
*Green package meets RoHS Directive 2002/95/EC of the European
Council to minimize the environmental impact of electrical equipment.
DESCRIPTION
The Zarlink Le77D11 dual-channel Voice over Subscriber
Line Interface Circuit (VoSLIC™) device has enhanced and
optimized features to directly address the requirements of
voice over broadband applications. Their common goal is to
reduce system level costs, space, and power through higher
levels of integration, and to reduce the total cost of ownership
by offering better quality of service. The Le78D11/Le77D11 is a
two-device chip set providing a totally software configurable
solution to the BORSCHT functions for two lines. The resulting
system is less complex, smaller, and denser, yet cost effective
with minimal external components. The Le77D11 Dual VoSLIC
device requires only two power supplies: +3.3 VDC and
nominally +12 VDC, but can range from +8 to +40 VDC
depending on the application. A single TTL-level clock source
drives the two switching regulators that generate the required
line voltage dynamically on a “per line” basis. Six
programmable states are available: Low Power Standby,
Disconnect, Normal Active, Reverse Polarity, Ringing and Line
Test. Binary fault detection is provided upon application of fault
conditions or thermal overload.
BLOCK DIAGRAM
Le77D112TC
Le77D112BTC
Le78D11
Codec
Device
Le77D11 SLIC
Interface
Document ID# 080696
Rev:
Distribution:
Codec
44-pin eTQFP
44-pin eTQFP (Green package)*
Switching Power
Switching Power
2-wire to 4-wire
2-wire to 4-wire
conversion
conversion
Supply
Supply
G
Public Document
Le77D11
Package
VE770 Series
Date:
Version: 2
Tip+Ring
Interface
Tip+Ring
Interface
2-wire
2-wire
Sep 19, 2007
Ring
Tip
Ring
Tip

Related parts for LE77D112BTC

LE77D112BTC Summary of contents

Page 1

... ORDERING INFORMATION An Le78D11 VoSLAC™ device must be used with this part. Device Le77D112TC 44-pin eTQFP Le77D112BTC 44-pin eTQFP (Green package)* *Green package meets RoHS Directive 2002/95/EC of the European Council to minimize the environmental impact of electrical equipment. DESCRIPTION The Zarlink Le77D11 dual-channel Voice over Subscriber Line Interface Circuit (VoSLIC™ ...

Page 2

... Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Supply Currents and Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 System Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Device Specifications .14 Test Circuit .18 Single Channel Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Application Circuit Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Physical Dimensions .21 44-Pin eTQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Revision .22 Revision .22 Revision .22 Revision .22 Revision .22 Revision .22 2 Zarlink Semiconductor Inc. ...

Page 3

... Controller 1 Logic VSW Control Switcher SD 2 ILS Logic Controller (TIP) Signal 2-Wire Conditioning Interface Signal Transmission Fault Detection BGND BGND AGND VCC Zarlink Semiconductor Inc programmable from mA. SC Loop/Cable DSLAM/ HEADEND WLL F 1 NPRFILT 1 VIN 1 VOUT 1 VHP 1 CFILT 1 LPF 1 IMT 1 RDC ...

Page 4

... C REF NPRi ∆t = ----------------------------------- I NPR Figure 3. DC Feed Curve 14 LOOP Zarlink Semiconductor Inc. ) can be LTH (RING). This voltage from the Level Shift block B . This reduced LPFi (TIP) is held constant, while B (RING) is changed )/500 = CS1], all of the LOOP LTH , may be used to increase the transition ...

Page 5

... On the positive half cycle of the input waveform, when near –4 V and V A(TIP) B(RING) is brought more negative. The waveform can be either sinusoidal or trapezoidal under the rating is 140 V. Due to the switching efficiency and overhead voltage, CEO = 12 V. See SW 5 Zarlink Semiconductor Inc. .) REF A (TIP ...

Page 6

... SW pin to the base of the external power device Zarlink Semiconductor Inc. ) that tracks Tip and Ring voltage for the two- REG . In doing so, the switcher saves power REG 7) is generated on the Le77D11 VoSLIC device 9 Ω ...

Page 7

... BLANKING FILTER LATCH OUTPUT SET RESET DRIVER - + COMPARATOR 8), summed, attenuated and converted to voltage at the CFILT pin. This voltage then goes ), second is the gain from the four-wire (V 2WIN ) side (G ). OUT 2WIN F V OUT IMT 7 Zarlink Semiconductor Inc. and VSW + + 0. LIMi + ILS - BDi ...

Page 8

... G IMT F Four-Wire to Two-Wire Gain ( the gain from the VIN input to the line. This gain is defined where K is the gain from VIN this circuit is 7.3 dB. Note: Equation derivations can be found in the Zarlink Le77D11/Le78D11 Chip Set User’s Guide (document ID# 080716 ...

Page 9

... In Reverse Polarity state, a foreign voltage fault occurs in which V In the Disconnect state, fault detection is not supported; however, fault conditions can be monitored by the Le78D11 device. For more details on AC, DC fault detection, loss of power, or clock-failure alarm, please refer to the Zarlink Le77D11/Le78D11 Chip Set User’s Guide (document ID# 080716). ...

Page 10

... CONNECTION DIAGRAM CFILT 2 IMT 2 LPF 2 RDC 2 VREF VCC AGND FSET RDC 1 LPF 1 IMT 1 Note: 1. Pin 1 is marked for orientation 44-pin eTQFP Exposed Pad Zarlink Semiconductor Inc. BGND 33 2 CHS 32 2 ILS CHCLK 29 28 VSW ILS 1 25 CHS 1 24 BGND 1 23 VREG 1 ...

Page 11

... VoSLIC device Switching Regulators. (Channels 1 and 2). A positive supply used to generate the negative supplies of V Supply V (common to both channels). REG2 Exposed pad on underside of device must be connected to a heat Isolated spreading area. The AGND plane is recommended. 11 Zarlink Semiconductor Inc. Description pin of Le78D11 each LTH and CFILT . 1 2 ...

Page 12

... Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile. OPERATING RANGES Zarlink guarantees the performance of this device over commercial (0° to 70°C) and industrial (−40° to 85°C) temperature ranges by conducting electrical characterization over each range, and by conducting a production test with single insertion coupled to periodic sampling ...

Page 13

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Page 14

... NPR with respect REF = 1400 Ω with respect REF = 1400 Ω open --------- - 1400 Ω 0.9 Vpk 1400 Ω 0.9 Vpk Zarlink Semiconductor Inc. Typ Max Unit • +20 Typ Max Unit –4 – 54.5 –58 –66 –54 – 11 LTH LTH + 11.5 ...

Page 15

... B(RING) to GND IMT = 600 Ω – --------- - LOOP 525 I < |40 mA < |55 mA| --------- - L 520 I < |90 mA Zarlink Semiconductor Inc. Typ Max Unit Note 135 180 mApk 4. 85.3 kHz 0.28 0.31 V Ω 7000 +1 µA Ω 50 V/µsec − 0.3 V − 0.2 V ...

Page 16

... REF –40 REF = 20 kΩ –50 200 –20 –20 0 4.45 2.0 –150 –100 2.4 16 Zarlink Semiconductor Inc. Typ Max Unit Note 14 14.3 9.54 9.74 4. 7.96 8.16 –9.54 –9.34 –1.58 –1.38 +0.1 dB +0.1 +0.1 4. +0.15 4., 7 ...

Page 17

... Ringing –180 Active and Reverse Polarity –110 Standby and Line Test –80 = 100 Ω with respect V = 0.7V REF I = 1mA 2.8 IMT (Ring) pins 600 Ω. LAC 17 Zarlink Semiconductor Inc. Typ Max Unit 1 MΩ –5 +5 +180 +110 +80 80 120 Note 3. µ ...

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Page 20

... W Resistor 475 K 1% 1/16 W Resistor 237 k 1% 1/8 W Resistor 1/ Zarlink Semiconductor Inc. SW Comments Panasonic / ECJ-1VB1H102K, 0603 Kemet C0603C273K5RAC Panasonic / ECJ-1VF1C104Z, 0603 CalChip GMC31X7R104K200NT Panasonic / ECJ-1VB1C104K (optional) CalChip GMC31X7R104K200NT Panasonic / ECJ-2YB0J155K,0805 Panasonic ECS-TOJY475R Tecate CMC-300/105KX1825T060 Nichicon / UPW1E221MPH DIGI-KEY / PCC1840CT-ND,0805 General Semi. / ES2C ...

Page 21

... BSC D2 0.08 - 0. aaa 0 deg 3.5 deg 7 deg bbb 0 deg - - ccc 11 deg 12 deg 13 deg ddd 11 deg 12 deg 13 deg N 44-Pin eTQFP 21 Zarlink Semiconductor Inc. Nom Max - 0.20 0.60 0.75 1.00 REF - - 0.20 0.27 0.80 BSC 8.00 8.00 0.20 0.20 0.10 0.20 44 ...

Page 22

... Updated DC specifications to Vreg, Isc, IMTi and Metering Gain based on Errata notice April 29 2004 revision A1 for device version JCBB. • Included operational issues 3.0 from errata notice April 29, 2004. Revision • Enhanced format of package drawing in • Added new headers/footers due to Zarlink purchase of Legerity on August 3, 2007 , the following changes were made: , Ringing operation state, removed condition 70° and C ...

Page 23

... Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned ...

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