XC5204-3PQ160C Xilinx Inc, XC5204-3PQ160C Datasheet - Page 44

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XC5204-3PQ160C

Manufacturer Part Number
XC5204-3PQ160C
Description
FPGA XC5200 Family 6K Gates 480 Cells 83MHz 0.5um (CMOS) Technology 5V 160-Pin PQFP
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC5204-3PQ160C

Package
160PQFP
Family Name
XC5200
Device Logic Units
120
Device System Gates
6000
Number Of Registers
480
Maximum Internal Frequency
83 MHz
Typical Operating Supply Voltage
5 V
Maximum Number Of User I/os
124
Re-programmability Support
Yes

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XC5200 Series Field Programmable Gate Arrays
XC5200 Program Readback Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Internal timing parameters are not measured directly. They are derived from benchmark timing patterns
that are taken at device introduction, prior to any process improvements.
The following guidelines reflect worst-case values over the recommended operating conditions.
Note 1: Timing parameters apply to all speed grades.
Note 2: rdbk.TRIG is High prior to Finished, Finished will trigger the first Readback
7-126
rdbk.TRIG
rdclk.1
Internal Net
rdbk.DATA
rdbk.TRIG
Finished
rdbk.RIP
rdclk.I
Description
rdbk.TRIG setup to initiate and abort Readback
rdbk.TRIG hold to initiate and abort Readback
rdbk.DATA delay
rdbk.RIP delay
High time
Low time
4
1
Product Obsolete or Under Obsolescence
T
T
RCL
RTRC
T
RCRT
DUMMY
T
T
RCRD
T
RCRR
RCH
2
7
5
6
DUMMY
VALID
VALID
7
6
5
4
T
1
2
RTL
Symbol
3
T
T
T
T
T
T
RTRC
RCRT
RCRD
RCRR
RCH
RCL
Min
200
250
250
50
November 5, 1998 (Version 5.2)
-
-
Max
250
250
500
500
-
-
X1790
Units
ns
ns
ns
ns
ns
ns
R

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