AD6650ABCZ Analog Devices Inc, AD6650ABCZ Datasheet - Page 37

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AD6650ABCZ

Manufacturer Part Number
AD6650ABCZ
Description
DIVERSITY IF-TO-BASEBAND GSM/EDGE NARROW-BAND RECEIVER
Manufacturer
Analog Devices Inc
Datasheet

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Reg.
(Hex)
14
15
16
17
18
19
1A
Mnemonic
Start Holdoff Counter
CIC4 Decimation (M
CIC4 Scale (Scale − 12)
IIR Control
RCF Decimation Register
(M
RCF Decimation Phase
(P
RCF Coefficient Offset
(CO
RCF
RCF
RCF
)
− 1)
)
CIC4
− 1)
Bit
Width
16
5
4
1
3
3
6
Description
The power-up sequence is initiated with a
Soft_SYNC or Pin_SYNC and then the start
holdoff counter counts down to 1, and the
chip power-up sequence starts. 0 is an
invalid value.
Should be ≥12 because CIC and IIR have
maximum rates of 26 MHz/12.
Controls the attenuation of the data into the
CIC4 stage in 6 dB increments. This register
has a range of 12 to 20, which supports
decimations from 8 to 32 according to
Equation 4.
Sync mask.
Decimation of 1 to 8.
Phase from 0 to M
Range is 0 to 48 taps.
Rev. A | Page 37 of 44
RCF
− 1.
Additional Information
Code
1
2
.
.
65,534
65,535
Code
7
8
9
.
.
30
31
Code
0
1
2
.
.
7
8
Code
0
1
Code
0
1
2
.
.
6
7
Code
0
1
.
.
6
7
Code
0
1
2
.
.
46
47
Count
1
2
.
.
65,534
65,535
Decimation
8
9
10
.
.
31
32
Scale Factor
12
13
14
.
.
19
20
Results
Disabled
Enabled
Decimation
1
2
3
.
.
7
8
Phase
0
1
.
.
6
7
Offset
0
1
2
.
.
46
47
AD6650

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