CS5102A-JL Cirrus Logic Inc, CS5102A-JL Datasheet - Page 26

• Manufacturer Part Number: CS5102A-JL
• Description: ADC Single SAR 20KSPS 16-Bit Serial 28-Pin PLCC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5102A-JL

• Package: 28PLCC
• Resolution: 16 Bit
• Sampling Rate: 20 KSPS
• Architecture: SAR
• Number Of Adcs: 1
• Number Of Analog Inputs: 2
• Digital Interface Type: Serial
• Input Type: Voltage
• Signal To Noise Ratio: 90(Typ) dB
• Polarity Of Input Voltage: Unipolar|Bipolar

captured and processed. The FFT algorithm ana-
lyzes the spectral content of the digital waveform
and distributes its energy among 512 "frequency
bins." Assuming an ideal sinewave, distribution
of energy in bins outside of the fundamental and
dc can only be due to quantization effects and
errors in the CS5101A and CS5102A.
If sampling is not synchronized to the input sine-
wave, it is highly unlikely that the time record
will contain an integer number of periods of the
input signal. However, the FFT assumes that the
signal is periodic, and will calculate the spectrum
of a signal that appears to have large discontinui-
ties, thereby yielding a severely distorted
spectrum. To avoid this problem, the time record
is multiplied by a window function prior to per-
forming the FFT. The window function smoothly
forces the endpoints of the time record to zero,
thereby removing the discontinuities. The effect
of the window in the frequency-domain is to con-
volute the spectrum of the window with that of
the actual input.
The quality of the window used for harmonic
analysis is typically judged by its highest side-
lobe level. A five term window is used in FFT
testing of the CS5101A and CS5102A. This win-
dowing algorithm attenuates the side-lobes to
below the noise floor. Artifacts of windowing are
discarded from the signal-to-noise calculation us-
ing the assumption that quantization noise is
white. Averaging the FFT results from ten time
records filters the spectral variability that can
arise from capturing finite time records without
disturbing the total energy outside the fundamen-
tal. All harmonics are visible in the plots. For
more information on FFT’s and windowing refer
to: F.J. HARRIS, "On the use of windows for
harmonic analysis with the Discrete Fourier
Transform", Proc. IEEE, Vol. 66, No. 1, Jan
1978, pp.51-83. This is available on request from
Crystal Semiconductor.
As illustrated in Figure 17, the CS5101A typi-
cally provides about 92 dB S/(N+D) and
26
0.001% THD at 25 C. Figure 18 illustrates only
minor degradation in performance when the am-
bient temperature is raised to 138 C. Figure 19
and 20 illustrate that the CS5102A typically
yields >92 dB S/(N+D) and 0.001% THD even
with a large change in ambient temperature. Un-
like conventional successive-approximation
ADC’s, the signal-to-noise and dynamic range of
the CS5101A and CS5102A are not limited by
differential nonlinearities (DNL) caused by cali-
bration errors. Rather, the dominant noise source
is broadband thermal noise which aliases into the
baseband. This white broadband noise also ap-
pears as an idle channel noise of 1/2 LSB (rms).
Sampling Distortion
Like most discrete sample/hold amplifier designs,
the inherent sample/hold of the CS5101A and
CS5102A exhibits a frequency-dependent distor-
tion due to nonideal sampling of the analog input
voltage. The calibrated capacitor array used dur-
ing conversions is also used to track and hold the
analog input signal. The conversion is not per-
formed on the analog input voltage per se, but is
actually performed on the charge trapped on the
capacitor array at the moment the HOLD com-
mand is given. The charge on the array ideally
assumes a linear relationship to the analog input
voltage. Any deviation from this linear relation-
ship will result in conversion errors even if the
conversion process proceeds flawlessly.
At dc, the DAC capacitor array’s voltage coeffi-
cient dictates the converter’s linearity. This
variation in capacitance with respect to applied
signal voltage yields a nonlinear relationship be-
tween the charge on the array and the analog
input voltage and places a bow or wave in the
transfer function. This is the dominant source of
distortion at low input frequencies (Fig-
ures 17,18,19, and 20).
The ideal relationship between the charge on the
array and the input voltage can also be distorted
CS5101A CS5102A
DS45F2