DD-160128FC-2B DENSITRON, DD-160128FC-2B Datasheet - Page 18
DD-160128FC-2B
Manufacturer Part Number
DD-160128FC-2B
Description
62M4129
Manufacturer
DENSITRON
Datasheet
1.DD-160128FC-1A.pdf
(45 pages)
Specifications of DD-160128FC-2B
Screen Size
42.926mm
Resolution
160 X 128
Viewing Area (h X W)
28.864mm X 35.575mm
Interface Type
Parallel, Serial
Pixel Size (h X W)
0.045mm X 0.194mm
Voltage Rating
2.8V
Svhc
No SVHC
Rohs Compliant
Yes
SYNCOAM Co., Ltd. SEPS525 Version: 0.2
INDEX (00h)
STATUS_RD (01h)
OSC_CTL (02h)
IDX[7:0] : Index address of registers.
The status read instruction reads the internal status of the SEPS525.
HC : Horizontal address increment/decrement at memory write mode.
VC : Vertical address increment/decrement at memory write mode.
HV : Automatic update method of the AC(means internal address counter).
SWAP : Swap between R and B.
RD : Row scan shift direction.
CD : Column data shift direction.
DC[1:0] : Display data output control.
SELEXP : OSC
When SELEXP = 0, EXPORT1 internal clock
When SELEXP = 1, EXPORT1 “0” level
SELRES : Internal oscillator mode selection.
When SELRES = 0, Oscillator operates with external resister
When SELRES = 1, Oscillator operates with internal resister
SELCLK, OSCDSB :
Default
Default
R/W
R/W
SELCLK
R
R
X
0
1
HV=0(horizontal), HV=1(vertical)
SELEXP
IDX7
Bit 7
Bit 7
HC
Bit 7
1
OSCDSB
1
0
1
1
IDX6
SELRES
Bit6
Bit6
VC
1
Bit6
1
CLOCK OFF
Internal OSC ON
External CLK mode
IDX5
Bit5
Bit5
HV
0
Bit5
0
‐
SWAP
IDX4
Bit4
Bit4
0
Bit4
0
‐
IDX3
Bit3
Bit3
RD
0
Bit3
0
‐
IDX2
Bit2
Bit2
CD
0
Bit2
0
‐
IDX1
DC1
Bit1
Bit1
0
SELCLK
Bit1
0
IDX0
DC0
Bit0
Bit0
0
OSCDSB
Bit0
0
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