NUC140LE3CN Nuvoton Technology Corporation of America, NUC140LE3CN Datasheet - Page 310

no-image

NUC140LE3CN

Manufacturer Part Number
NUC140LE3CN
Description
IC MCU 32BIT 128KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™ NUC100r
Datasheets

Specifications of NUC140LE3CN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NUC140LE3CN
Manufacturer:
NuvoTon
Quantity:
141
Part Number:
NUC140LE3CN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC140LE3CN
Manufacturer:
NUVOTON
Quantity:
20 000
5.10.4.4 Continuous Counting Mode
5.10.4.5 Event Counting Function
If the timer is operated at continuous counting mode and CEN (TCSR[30] timer enable bit) is set
to 1, the associated interrupt signal is generated depending on TDR = TCMPR if IE (TCSR[29]
interrupt enable bit) is enabled. User can change different TCMPR value immediately without
disabling timer counting and restarting timer counting. For example, TCMPR is set as 80, first.
(The TCMPR should be less than 2
IE is enabled and TIF (timer interrupt flag) will set to 1 then the interrupt signal is generated and
sent to NVIC to inform CPU when TDR value is equal to 80. But the CEN is kept at 1 (counting
enable continuously) and TDR value will not goes back to 0, it continues to count 81, 82, 83,˙˙˙
to 2
TIF is cleared to 0, then timer interrupt occurred and TIF is set to 1, then the interrupt signal is
generated and sent to NVIC to inform CPU again when TDR value reaches to 200. At last, user
programs TCMPR as 500 and clears TIF to 0 again, then timer interrupt occurred and TIF sets to
1 then the interrupt signal is generated and sent to NVIC to inform CPU when TDR value reaches
to 500. From application view, the interrupt is generated depending on TCMPR. In this mode, the
timer counting is continuous. So, this operation mode is called as continuous counting mode.
It also provides an application which can count the event from TM0~TM3 pins. It is called as event
counting function. In event counting function, the clock source of timer controller, TMRx_CLK, in
Figure 5-65 should be set as HCLK. It provides TM0~TM3 enabled or disabled de-bounce
function by TEXCONx[7] and TM0~TM3 falling or rising phase counting setting by TEXCONx[0].
And, the event count source operating frequency should be less than 1/3 HCLK frequency if
disable counting de-bounce or less than 1/8 HCLK frequency if enable counting de-bounce.
Otherwise, the returned TDR value is incorrect.
TDR = 0
TCMPR = 80
24
Set
-1, 0, 1, 2, 3, ˙˙˙ to 2
NuMicro™ NUC130/NUC140 Technical Reference Manual
TIF = 1 and
Generation
Interrupt
TDR = 100
Clear TIF as 0
TCMPR = 200
and Set
TIF = 1 and
Generation
TDR = 200
Interrupt
24
Figure 5-66 Continuous Counting Mode
-1 again and again. Next, if user programs TCMPR as 200 and the
TCMPR = 500
Clear TIF as 0
and Set
24
and be greater than 1). The timer generates the interrupt if
TDR from 2
TDR = 300
- 310 -
24
-1 to 0
TDR = 400
Publication Release Date: June 14, 2011
TIF = 1 and
Generation
TDR = 500
Interrupt
Clear TIF as 0
TCMPR = 80
and Set
Revision V2.01
TDR = 2
24
-1

Related parts for NUC140LE3CN