EVAL-ADV7619EB1Z Analog Devices Inc, EVAL-ADV7619EB1Z Datasheet - Page 12

• Manufacturer Part Number: EVAL-ADV7619EB1Z
• Description: BOARD EVAL FOR ADV7619
• Manufacturer: Analog Devices Inc
• Series: Advantiv®, Xpressview™r

Specifications of EVAL-ADV7619EB1Z

• Main Purpose: Video, HDMI Receiver
• Embedded: No
• Utilized Ic / Part: ADV7619
• Primary Attributes: Dual Port, 3 GHz HDMI Receiver
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ADV7619
Pin No.
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
Mnemonic
AP2
AP3
AP4
SCLK/INT2
AP5
MCLK/INT2
DVDD
SDA
SCL
INT1
RESET
CS
PVDD
XTALP
XTALN
DVDD
CEC
DDCB_SCL
DDCB_SDA
HPA_B
RXB_5V
DDCA_SCL
DDCA_SDA
HPA_A/INT2
RXA_5V
NC
NC
Type
Miscellaneous
Miscellaneous
Miscellaneous
Miscellaneous digital
Miscellaneous
Miscellaneous digital
Power
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Power
Miscellaneous
Miscellaneous
Power
Digital input/output
HDMI input
HDMI input
Miscellaneous digital
HDMI input
HDMI input
HDMI input
Miscellaneous digital
HDMI input
No connect
No connect
Description
Audio Output Pin. This pin can be configured to output S/PDIF digital audio, high bit
rate (HBR), Direct Stream Digital (DSD), or I
Audio Output Pin. This pin can be configured to output S/PDIF digital audio, high bit
rate (HBR), Direct Stream Digital (DSD), or I
Audio Output Pin. This pin can be configured to output S/PDIF digital audio, high bit
rate (HBR), Direct Stream Digital (DSD), or I
Serial Clock/Interrupt 2. This dual-function pin can be configured to output the audio
serial clock or an Interrupt 2 signal.
Audio Output Pin. This pin can be configured to output S/PDIF digital audio, high bit
rate (HBR), or Direct Stream Digital (DSD). Pin AP5 is typically used to provide the
LRCLK for I
Master Clock/Interrupt 2. This dual-function pin can be configured to output the audio
master clock or an Interrupt 2 signal.
Digital Core Supply Voltage (1.8 V).
I
I
Interrupt. This pin can be active low or active high. When status bits change, this pin is
triggered. The events that trigger an interrupt are user configurable.
System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required
to reset the
Chip Select. This pin has an internal pull-down. Pulling this line up causes I
machine to ignore I
PLL Supply Voltage (1.8 V).
Input Pin for 28.63636 MHz Crystal or External 1.8 V, 28.63636 MHz Clock Oscillator
Source to Clock the ADV7619.
Crystal Input. Input pin for 28.63636 MHz crystal.
Digital Core Supply Voltage (1.8 V).
Consumer Electronics Control Channel.
HDCP Slave Serial Clock Port B. DDCB_SCL is a 3.3 V input that is 5 V tolerant.
HDCP Slave Serial Data Port B. DDCB_SDA is a 3.3 V input that is 5 V tolerant.
Hot Plug Assert Signal Output for HDMI Port B.
5 V Detect Pin for Port B in the HDMI Interface.
HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input that is 5 V tolerant.
HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input that is 5 V tolerant.
Hot Plug Assert/Interrupt 2. This dual-function pin can be configured to output the
Hot Plug assert signal for HDMI Port A or an Interrupt 2 signal.
5 V Detect Pin for Port A in the HDMI Interface.
No Connect. Do not connect to this pin.
No Connect. Do not connect to this pin.
2
2
C Port Serial Data Input/Output Pin. SDA is the data line for the control port.
C Port Serial Clock Input. SCL is the clock line for the control port.
Rev. A | Page 12 of 24
2
S modes.
ADV7619
2
C transmission.
circuitry.
2
2
2
S.
S.
S.
Data Sheet
2
C state