DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 169

• Manufacturer Part Number: DS2156L+
• Description: IC TXRX T1/E1/J1 1-CHIP 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS2156L+

• Function: Single-Chip Transceiver
• Interface: E1, J1, T1, TDM, UTOPIA II
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

24.2 UTOPIA Clock Modes
When the UTOPIA backplane is enabled, the user can select from several clocking modes: full T1/E1,
clear-channel E1, or fractional T1/E1. Because ATM bytes are byte-aligned in the frame, clear-channel
mode is only available in E1 operation. See Table 24-A for the various register configurations. Figure
24-1 shows a simplified diagram of the clock, data, and sync connections between the framer and the
UTOPIA block.
Figure 24-1. UTOPIA Clocking Configurations
24.3 Full T1/E1 Mode and Clear-Channel E1 Mode
In full T1/E1 mode, the framer is programmed to provide a constant clock (RCLK for the receiver and
TCLK for the transmitter) to the UTOPIA block by setting CCR3.4 and CCR3.5 = 1. The framer also
provides frame-sync pulses to the UTOPIA block. The UTOPIA block is programmed to use the clock
and sync signals by setting U_TCR2.1 and U_RCR2.1 = 0. In this mode the UTOPIA block uses the sync
signal to byte align the transmit data stream and locate the F-bit position in T1 operation and TS0 and
TS16 in E1 operation.
In T1 mode, the receive and transmit UTOPIA blocks always use the frame-sync pulse to gap out the F-
bit position.
In E1 mode, the transmit UTOPIA block can be programmed to gap out TS0 and TS16 by setting
U_TCR1.3 = 0, or use the full 256 bits of the frame by setting U_TCR1.3 = 1. Using the full 256 bits of
the frame is referred to as clear-channel mode and is only available in E1 mode. In full E1 mode, the
receive UTOPIA block always uses the frame-sync pulse to gap out TS0 and TS16. In order for the
receive UTOPIA block to operate in clear-channel mode, set U_RCR2.1 = 1 while in full clock mode or
use the fractional mode of operation described in Section 24.4 with all channels selected.
NETWORK
RECEIVE
FRAMER
TRANSMIT
FRAMER
FRAME SYNC
FRAME SYNC
GAPPED
CLOCK
GAPPED
CLOCK
CCR3.4
RCLK
DATA
CCR3.5
TCLK
DATA
1
0
1
0
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CLOCK
CLOCK
DATA
SYNC
DATA
SYNC
TRANSMIT
UTOPIA BLOCK
RECEIVE
UTOPIA BLOCK
BACKPLANE
TCLK
UTOPIA