C8051F317-GMR Silicon Laboratories Inc, C8051F317-GMR Datasheet - Page 222

• Manufacturer Part Number: C8051F317-GMR
• Description: MCU 8-Bit C8051F31x 8051 CISC 16KB Flash 3.3V 24-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F317-GMR

• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F31x
• Maximum Speed: 25 MHz
• Ram Size: 1.25 KB
• Program Memory Size: 16 KB
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 21
• Interface Type: I2C/SMBus/SPI/UART
• On-chip Adc: 17-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 4

C8051F310/1/2/3/4/5/6/7
19.3. PCA Counter
On “REV A” devices, if the main PCA counter (PCA0H : PCA0L) overflows during the execution phase of a
read-modify-write instruction (bit-wise SETB or CLR, ANL, ORL, XRL) that targets the PCA0CN register,
the CF (Counter Overflow) bit will not be set. An example software work-around is as follows:
This behavior is not present on “REV B” and later devices. Software written for “REV A” devices will run on
“REV B” and later devices without modification.
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Step 1. Disable global interrupts (EA = 0).
Step 2. Read PCA0L. This will latch the value of PCA0H.
Step 3. Read PCA0H, saving the value.
Step 4. Execute the bit-wise operation on CCFn (for example, CLR CCF0, or CCF0 = 0;).
Step 5. Read PCA0L.
Step 6. Read PCA0H, saving the value.
Step 7. If the value of PCA0H read in Step 3 is 0xFF and the value for PCA0H read in Step 6 is
Step 8. Re-enable interrupts (EA = 1).
0x00, then manually set the CF bit in software (for example, SETB CF, or CF = 1;).
Rev. 1.7