C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 190

• Manufacturer Part Number: C8051F502-IMR
• Description: MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F502-IMR

• Package: 32QFN EP
• Device Core: 8051
• Family Name: C8051F50x
• Maximum Speed: 50 MHz
• Ram Size: 4.25 KB
• Program Memory Size: 64 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/UART
• On-chip Adc: 32-chx12-bit
• Operating Temperature: -40 to 125 °C
• Number Of Timers: 4

C8051F50x/F51x
SFR Definition 20.10. P3MASK: Port 3 Mask Register
SFR Address = 0xAF; SFR Page = 0x00
SFR Definition 20.11. P3MAT: Port 3 Match Register
SFR Address = 0xAE; SFR Page = 0x00
190
Note: P3.1–P3.7 are only available on the 48-pin and 40-pin packages
Note: P3.1–P3.7 are only available on the 48-pin and 40-pin packages
Name
Reset
Name
Reset
7:0
7:0
Bit
Bit
Type
Type
Bit
Bit
P3MASK[7:0]
P3MAT[7:0]
Name
Name
7
0
7
1
Port 1 Mask Value.
Selects P3 pins to be compared to the corresponding bits in P3MAT.
0: P3.n pin logic value is ignored and cannot cause a Port Mismatch event.
1: P3.n pin logic value is compared to P3MAT.n.
Port 3 Match Value.
Match comparison value used on Port 3 for bits in P3MAT which are set to 1.
0: P3.n pin logic value is compared with logic LOW.
1: P3.n pin logic value is compared with logic HIGH.
6
0
6
1
5
0
5
1
Rev. 1.2
4
P3MASK[7:0]
0
4
1
P3MAT[7:0]
R/W
R/W
Function
Function
3
0
3
1
2
0
2
1
1
0
1
1
0
0
0
1