AGLN125V2-VQG100 Actel, AGLN125V2-VQG100 Datasheet - Page 88

• Manufacturer Part Number: AGLN125V2-VQG100
• Manufacturer: Actel

IGLOO nano DC and Switching Characteristics
Table 2-95 • RAM512X18
2 -7 4
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
F
Note:
AS
AH
ENS
ENH
DS
DH
CKQ1
CKQ2
C2CRWH
C2CWRH
RSTBQ
REMRSTB
RECRSTB
MPWRSTB
CYC
MAX
For specific junction temperature and voltage supply levels, refer to
values.
Address setup time
Address hold time
REN_B, WEN_B setup time
REN_B, WEN_B hold time
Input data (DI) setup time
Input data (DI) hold time
Clock HIGH to new data valid on DO (output retained, WMODE = 0)
Clock HIGH to new data valid on DO (pipelined)
Address collision clk-to-clk delay for reliable read access after write on same address;
applicable to opening edge
Address collision clk-to-clk delay for reliable write access after read on same address;
applicable to opening edge
RESET_B LOW to data out LOW on DO (flow-through)
RESET_B LOW to data out LOW on DO (pipelined)
RESET_B removal
RESET_B recovery
RESET_B minimum pulse width
Clock cycle time
Maximum frequency
Commercial-Case Conditions: T
J
= 70°C, Worst-Case V
A d v a n c e v 0. 3
Description
CC
= 1.425 V
Table 2-6 on page 2-6
for derating
0.83
0.16
0.73
0.08
0.71
0.36
4.21
1.71
0.35
0.42
2.06
2.06
0.61
3.21
0.68
6.24
Std. Units
160 MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns