CDP6402CE Harris Corporation, CDP6402CE Datasheet
CDP6402CE
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CDP6402CE Summary of contents
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... HD6402 Ordering Information PACK- 5V/200K AGE TEMP. RANGE BAUD o o PDIP - +85 C CDP6402CE Burn-In CDP6402CEX o o SBDIP - +85 C CDP6402CD Burn-In CDP6402CDX CDP6402DX Pinout CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. © Copyright Harris Corporation 1996 ...
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TRE TBRL TRANSMITTER STOP TIMING TRC AND CONTROL CLS1 CLS2 CRL MR RRC RECEIVER TIMING AND DRR CONTROL STOP LOGIC SFD DR OE TBRE FE CDP6402, CDP6402C TBR8 (MSB) TRANSMITTER BUFFER REGISTER PARITY LOGIC TRANSMITTER REGISTER MULTIPLEXER CONTROL REGISTER MULTIPLEXER ...
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Absolute Maximum Ratings DC Supply-Voltage Range CDP6402 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Static Electrical Specifications at T CONDITIONS V O PARAMETER (V) Input High Voltage V 0.5, 4.5 IH 0.5, 9.5 Input Leakage I Any IN Current Input Three-State Output OUT Leakage Current 0, 10 Operating Current I - ...
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Description of Operation Initialization and Controls A positive pulse on the MASTER RESET (MR) input resets the control, status, and receiver buffer registers, and sets the serial output (TRO) High. Timing is generated from the clock inputs RRC and TRC ...
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CONTROL WORD CLS2 CLS1 ...
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PIN SYMBOL 1 V Positive Power Supply DD 2 N/C No Connection 3 GND Ground ( RRD A high level on RECEIVER REGISTER DISABLE forces the receiver holding register ouputs RBR1-RBR8 to a high impedance state. 5 ...
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TABLE 2. FUNCTION PIN DEFINITION (Continued) PIN SYMBOL 25 TRO Character data, start data and stop bits appear serially at the TRANSMITTER REGISTER OUTPUT. 26 TBR1 Character data is loaded into the TRANSMITTER BUFFER REGISTER via inputs TBR1-TBR8. For character ...
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Dynamic Electrical Specifications (NOTE 1) PARAMETER SYSTEM TIMING (See Figure 6) Minimum Pulse Width CRL Minimum Setup Time Control Word to CRL Minimum Hold Time Control Word after CRL Propagation Delay Time SFD High to SOD SFD Low to SOD ...
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Dynamic Electrical Specifications (NOTE 1) PARAMETER TRANSMITTER TIMING (See Figure 7) Minimum Clock Period (TRC) Minimum Pulse Width Clock Low Level Clock High Level TBRL Minimum Setup Time TBRL to Clock Data to TBRL Minimum Hold-Time Data after TBRL Propagation ...
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TRC t THC TBRL t THTH TRO t TTHR TBRE TRE t T BUS 0 T BUS 7 NOTES: 1. The holding register is loaded on the trailing edge of TBRL. 2. The transmitter shift register, ...
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Dynamic Electrical Specifications (NOTE 1) PARAMETERS RECEIVER TIMING (See Figure 8) Minimum Clock Period (RRC) Minimum Pulse Width Clock Low Level Clock High Level Data Received Reset Minimum Setup Time Data Start Bit to Clock Propagation Delay Time Data Received ...