MC74HC4514N Motorola, MC74HC4514N Datasheet

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MC74HC4514N

Manufacturer Part Number
MC74HC4514N
Description
1-of-16 decoder/demultiplexer
Manufacturer
Motorola
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
1-of-16 Decoder/Demultiplexer
with Address Latch
High–Performance Silicon–Gate CMOS
CMOS device. The device inputs are compatible with standard CMOS
outputs, with pullup resistors; they are compatible with LSTTL outputs.
Select input. When a low signal is applied to the Latch Enable input, the
Address is stored, and decoded. When the Chip Select input is high, all
sixteen outputs are forced to a low level.
ing, and cascading functions.
to select the desired device output, and then by using the Chip Select as a
data input.
10/95
ADDRESS
Motorola, Inc. 1995
The MC74HC4514 is identical in pinout to the MC14514B metal–gate
This device consists of a 4–bit storage latch with a Latch Enable and Chip
The Chip Select input is provided to facilitate the chip–select, demultiplex-
The demultiplexing function is accomplished by using the Address inputs
BINARY
INPUTS
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 268 FETs or 67 Equivalent Gates
ENABLE
SELECT
LATCH
CHIP
A0
A1
A2
A3
21
2
3
1
STORAGE
LATCH
4–BIT
LOGIC DIAGRAM
PIN 24 = V CC
PIN 12 = GND
DECODER
4–TO–16
LINE
11
9
10
8
7
6
5
4
18
17
20
19
14
13
16
15
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
1
ACTIVE–HIGH
OUTPUTS
REV 6
24
MC74HC4514
1
ENABLE
24
LATCH
MC74HCXXXXN
MC74HCXXXXDW
ORDERING INFORMATION
GND
1
A0
A1
Y7
Y6
Y4
Y3
Y1
Y2
Y0
Y5
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
11
12
PLASTIC PACKAGE
24
23
22
21
20
19
18
17
16
15
14
13
SOIC PACKAGE
CASE 751E–04
CASE 724–03
DW SUFFIX
N SUFFIX
Plastic
SOIC
CHIP
SELECT
V CC
A3
A2
Y10
Y11
Y8
Y9
Y14
Y15
Y12
Y13

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MC74HC4514N Summary of contents

Page 1

... High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 268 FETs or 67 Equivalent Gates LOGIC DIAGRAM BINARY 4–BIT A1 ADDRESS STORAGE 21 A2 INPUTS LATCH A3 LATCH 1 ENABLE CHIP SELECT 10/95 Motorola, Inc. 1995 4–TO–16 Y7 ACTIVE–HIGH 18 LINE OUTPUTS Y8 17 ...

Page 2

... Current (per Package) Î Î Î Î Î Î Î Î Î Î Î Î Î NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA Î Î Î Î Î Î Î Î Î ...

Page 3

... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ...

Page 4

... MC74HC4514 t f 90% CHIP 50% 10% SELECT t PLH 90% 50% OUTPUT Y 10% t TLH Figure LATCH 50% ENABLE t PLH 50% OUTPUT Y Figure 3. MOTOROLA SWITCHING WAVEFORMS GND INPUT A t PHL t PLH OUTPUT Y t THL V CC INPUT A 50% GND t PHL LATCH ENABLE TEST POINT OUTPUT DEVICE UNDER TEST * Includes all probe and jig capacitance Figure 5 ...

Page 5

... Chip Select (Pin 23) Chip Select Input. A high on this input produces a low level on all outputs, regardless of what appears at the address or Latch Enable inputs. A low level on the Chip Select input allows the selected output to produce a high level. TIMING DIAGRAM 5 MC74HC4514 PIN DESCRIPTIONS MOTOROLA ...

Page 6

... MC74HC4514 2 A0 DATA DATA DATA DATA Q LATCH ENABLE CHIP 23 SELECT MOTOROLA EXPANDED LOGIC DIAGRAM Y10 Y11 Y12 Y13 Y14 Y15 High–Speed CMOS Logic Data DL129 — Rev 6 ...

Page 7

... TO DEVICE SELECTS 1000–10FF 1100–11FF 1200–12FF 1300–13FF 1400–14FF 1500–15FF 1600–16FF 1700–17FF 1800–18FF 1900–19FF 1A00–1AFF 1B00–1BFF 1C00–1CFF 1D00–1DFF 1E00–1EFF 1F00–1FFF MOTOROLA ...

Page 8

... MC74HC4514 CODE TO CODE CONVERSION — HEXADECIMAL TO BCD + LATCH ENABLE Y10 Y11 Y12 Y13 CHIP Y14 SELECT Y15 GND ALL DIODES GENERAL PURPOSE GERMANIUM MOTOROLA COMMON CATHODE LEDs HC4050 HC4050 8 High–Speed CMOS Logic Data DL129 — Rev 6 ...

Page 9

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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