SAK-C167CR-4RM Infineon Technologies AG, SAK-C167CR-4RM Datasheet - Page 63

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SAK-C167CR-4RM

Manufacturer Part Number
SAK-C167CR-4RM
Description
16 Bit Single-Chip Microcontroller
Manufacturer
Infineon Technologies AG
Datasheet
General Notes For The Following Timing Figures
These standard notes apply to all subsequent timing figures. Additional individual notes
are placed at the respective figure.
1)
The falling edge of signals RD and WR/WRH/WRL/WrCS is controlled by the Read/Write delay feature (bit
BUSCON.RWDCx).
2)
A bus cycle is extended here, if MCTC waitstates are selected or if the READY input is sampled inactive.
3)
A bus cycle is extended here, if an MTTC waitstate is selected.
CLKOUT
Normal ALE
tc
10
Extended ALE
CSxL
tc
10
A23-A0
BHE, CSxE
WRL, WRH,
WR, WrCS
D15-D0
Figure 15
Demultiplexed Bus, Write Access
Data Sheet
Normal ALE Cycle
tc
11
tc
10
Extended ALE Cycle
tc
10
tc
tc
11
11
tc
10
Valid
tc
13
tc
12
1)
tc
10
tc
21
59
C167CR
C167SR
tc
11
tc
17
tc
19
tc
20
tc
18
Data OUT
2)
3)
MCTC
MTTC
V3.2, 2001-07
MCT04416

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