UPD75P068CU NEC, UPD75P068CU Datasheet
UPD75P068CU
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UPD75P068CU Summary of contents
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... PD75P068CU PD75P068GB-3B4 Caution The PD75P068 is not provided with mask-selected pull-up resistors. Please refer to "Quality Grades on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications. Document No. IC-3290A Major changes in this revision are indicated by stars ( ) in the margins. ...
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PIN CONFIGURATION (TOP VIEW) • 42-pin plastic shrink DIP XT1 XT2 RESET X1 X2 MD3/P33 MD2/P32 MD1/P31 MD0/P30 AV SS AN7/KR3/P63 AN6/KR2/P62 AN5/KR1/P61 AN4/KR0/P60 AN3/P113 AN2/P112 AN1/P111 AN0/P110 AV REF • 44-pin plastic QFP 44 43 ...
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Basic interval timer INTBT Program TI0/P13 Timer/ counter (13) counter #0 PTO0/P20 INTT0 SI/SB1/P03 Serial SO/SB0/P02 interface SCK/P01 INTCSI INT0/P10 INT1/P11 Interrupt INT2/P12 control INT4/P00 PROM program KR0-KR3/P60-P63 4 memory 8064 8 bits BUZ/P23 Watch timer INTW AV REF AV ...
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PIN FUNCTIONS ........................................................................................................................ 1.1 PORT PINS .......................................................................................................................................... 1.2 NON-PORT PINS ................................................................................................................................ 1.3 PIN INPUT/OUTPUT CIRCUITS ........................................................................................................ 2. DIFFERENCE BETWEEN THE PD75P068 AND PD75068 ................................................... 3. WRITING TO AND VERIFYING PROM (PROGRAM MEMORY) ............................................ 3.1 OPERATING MODES WHEN WRITING TO ...
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PIN FUNCTIONS 1.1 PORT PINS Input/ Pin Shared pin output P00 Input INT4 I/O P01 SCK P02 I/O SO/SB0 P03 I/O SI/SB1 P10 INT0 P11 INT1 Input P12 INT2 P13 TI0 P20 PTO0 P21 — I/O P22 PCL P23 ...
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... DD V — — SS Notes 1. The circle ( ) indicates the Schmitt trigger input. 2. Unless the V pin is directly connected to the V PP PD75P068 does not operate normally. 6 Function Input for receiving external event pulse signal for timer/event counter Timer/event counter output Clock output Output for arbitrary frequency output (for buzzer ...
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PIN INPUT/OUTPUT CIRCUITS The input/output circuit of each PD75P068 pin is shown below in a simplified manner. Type A (For type E- P-ch IN N-ch CMOS input buffer Type B IN Schmitt trigger input with hysteresis Type ...
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Type F-A P.U.R. enable Data Type D Output disable Type B P.U.R.: Pull-up resistor Type F-B P.U.R. enable V DD Output disable (P) P-ch Data Output N-ch disable Output disable (N) P.U.R.: Pull-up resistor Type M-A Data N-ch (Withstand Output ...
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Type Y-D P.U.R. enable Data Type D Output disable Type B Type Y P.U.R.: Pull-up resistor 2. DIFFERENCE BETWEEN THE PD75P068 AND PD75068 The PD75P068 is produced by replacing the internal mask ROM (program memory) of the PD75068 with a ...
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... OPERATING MODES WHEN WRITING TO AND VERIFYING THE PROGRAM MEMORY applied to the V pin and +12 applied to the V DD write/verify mode. The specific operating mode is then selected by setting the MD0 through MD3 pins as listed below. The remaining pins are all connected to V Operating mode specification V V MD0 ...
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... WRITING TO THE PROGRAM MEMORY The procedure for writing to program memory is described below; high-speed write is possible. (1) Connect all unused pins (2) Apply and V pins (3) Wait 10 s. (4) Select program memory address clear mode. (5) Apply + and +12 (6) Select program inhibit mode. (7) Select write mode for 1 ms duration and write data. ...
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... READING THE PROGRAM MEMORY The procedure for reading the contents of program memory is described below. The read is performed in the verify mode. (1) Connect all unused pins to V through resistors. Apply a low-level signal to the X1 pin. SS (2) Apply and V pins (3) Wait 10 s. (4) Select program memory address clear mode. ...
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... It is recommended that you screen (verify) PROM products after writing necessary data into them and storing them at 125 C for 24 hours. NEC offers a charged service called QTOP microcomputer service. This service includes writing to one- time PROM, marking, screening, and verification. ...
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ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS (T a Parameter Symbol Supply voltage V DD Supply voltage V PP Input voltage V Ports other than ports 4 and 5 I1 Ports 4 and Output voltage ...
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CHARACTERISTICS OF THE MAIN SYSTEM CLOCK OSCILLATOR (T Recommended Resonator Parameter constant Ceramic Oscillator resonator frequency ( Oscillation settling time Note 2 Crystal Oscillator frequency ( ...
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CHARACTERISTICS OF THE SUBSYSTEM CLOCK OSCILLATOR (T Recommended Resonator Parameter constant Crystal Oscillator V XT1 XT2 SS frequency Oscillation settling time Note 2 XT1 input External frequency XT1 XT2 clock (f XT XT1 input high/low ...
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RECOMMENDED CAPACITORS IN THE OSCILLATION CIRCUIT Main system clock: Ceramic resonator (T Manufacturer Part number KBR-1000F/Y KBR-2.0MS PBRC 2.00A KBR-3.0MS KBR-3.58MSA PBRC 3.58A KBR-3.58MKS KBR-3.58MWS Kyocera KBR-4.00MSA PBRC 4.00A KBR-4.00MKS KBR-4.00MWS KBR-5.0MSA PBRC 5.00A KBR-5.0MKS KBR-5.0MWS CRHF2.50 CRHF4.19 Toko CRHT4.19 ...
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DC CHARACTERISTICS (T = - Parameter Symbol High-level V Ports 2, 3, and 11 IH1 input voltage V Ports 0, 1, and 6, and RESET IH2 V Ports 4 and 5 IH3 V X1, X2, ...
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... KR0 to KR3 RESET low level width t RSL Notes 1. The cycle time of the CPU clock ( ) depends on the connected resonator frequency, the system clock control register (SCC), and the processor clock control register (PCC). The figure on the right side shows the cycle time t ...
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SERIAL TRANSFER OPERATION Two-wire and three-wire serial I/O modes (SCK ... Internal clock output): Parameter Symbol SCK cycle time 4.5 to 6.0 V KCY1 DD SCK high/low level 4.5 to 6.0 V KL1 DD ...
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SBI mode (SCK ... Internal clock output (master)): Symbol Parameter t SCK cycle time V = 4.5 to 6.0 V KCY3 DD t SCK high/low level KL3 V = 4 width t KH3 t SB0/SB1 setup ...
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A/D CONVERTER (T = - Parameter Symbol Resolution Note 1 2.5 V Absolute accuracy Note 3 Conversion time t CONV Note 4 Sampling time t SAMP Reference input voltage AV REF Analog input voltage V ...
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AC Timing Measurement Points (Excluding X1 and XT1 Inputs) 0. lock Timing X1 input XT1 input TI0 Timing TI0 0.8V Measurement DD points 0. 0.4 V 1/f ...
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Serial Transfer Timing Three-wire serial I/O mode: SCK SI t KSO1 SO Two-wire serial I/O mode: SCK SB0 and SB1 t KSO2 24 t KCY1 t t KL1 KH1 t t SIK1 KSI1 Input data Output data t KCY2 t ...
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Serial Transfer Timing Bus release signal transfer: SCK t KSB SB0 and SB1 Command signal transfer: SCK t t KSB SB0 and SB1 Interrupt Input Timing INT0, INT1, INT2 and INT4 KR0-KR3 RESET Input Timing RESET t KCY3 t KCY4 ...
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DATA HOLD CHARACTERISTICS BY LOW SUPPLY VOLTAGE IN DATA MEMORY STOP MODE (T = - Parameter Symbol Data hold supply voltage V DDDR Note 1 I Data hold supply current DDDR t Release signal setting time ...
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CHARACTERISTIC CURVES (FOR REFERENCE (When the main system clock operates at 4.19 MHz with a crystal 5.0 Crystal 4.19 MHz 3 1.0 0.5 0.1 0.05 0.01 0.005 0.001 ...
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(When the main system clock operates at 2.0 MHz with a crystal 5.0 Crystal 2.0 MHz 3 1.0 0.5 0.1 0.05 0.01 0.005 0.001 XT1 XT2 ...
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(When the main system clock operates at 4.19 MHz with a ceramic resonator XT1 5.0 Ceramic Crystal resonator 32.768 kHz 4.19 MHz 3 1.0 0.5 0.1 0.05 ...
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(When the main system clock operates at 2.0 MHz with a ceramic resonator 5.0 Ceramic resonator 2.0 MHz 3 1.0 0.5 0.1 0.05 0.01 0.005 0.001 ...
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˚ PCC = 0011 2.5 2.0 PCC = 0010 1.5 1.0 PCC = 0000 Main system clock 0.5 HALT mode ...
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(Port 2 ...
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PACKAGE DRAWINGS 42PIN PLASTIC SHRINK DIP (600 mil NOTES 1) Each lead centerline is located within 0.17 mm (0.007 inch) of its true position (T.P.) at maximum material condition. 2) Item "K" to ...
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PIN PLASTIC QFP ( 10 NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition ...
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... Notice Other versions of the products are available. For these versions, the recommended reflow soldering conditions have been mitigated as follows: Higher peak temperature (235 C), two-stage, and longer exposure limit. Contact an NEC representative for details. 10 mm) Soldering conditions Soldering conditions PD75P068 ...
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... EP-75068CU-R Emulation probe for the PD75P068GB. A 44-pin conversion socket, the EV-9200G-64, is EP-75068GB-R attached to the probe. EV-9200G-44 PROM programmer PG-1500 PROM programmer adapter for the PD75P068CU/GB. Connected to the PG-1500. PA-75P008CU IE control program Host machine • PC-9800 series (MS-DOS PG-1500 controller TM • PC/AT ...
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... Package Manual SMD Surface Mount Technology Manual Quality Grades on NEC Semiconductor Devices NEC Semiconductor Device Reliability/Quality Control System Electrostatic Discharge (ESD) Test Guide to Quality Assurance for Semiconductor Devices Caution The above documents may be revised without notice. Use the latest versions when you design an application system ...
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PD75P068 ...
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... Strong static electricity may cause dielectric breakdown in gates. When transporting or storing MOS devices, use conductive trays, magazine cases, shock absorbers, or metal cases that NEC uses for packaging and shipping. Be sure to ground MOS devices during assembling. Do not allow MOS devices to stand on plastic plates or do not touch pins. ...
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... The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. If customers intend to use NEC devices for above applications or they intend to use “Standard” quality grade NEC devices for applications not intended by NEC, please contact our sales people in advance. ...